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[Xen-devel] V2E tree on xenbits update


I've got the V2E tree on xenbits updated to tip (as of this weekend). There are a couple interesting issues that have cropped up based on some changes that have occurred since 3.0.3:

* The map cache is incompatible with V2E. This isn't that big of a problem since we can use the virtual TLB to simulate the map cache. At the moment, we just disable the map cache.

* OpenSuSE works quite happily (including gfxboot) provided we disable the APIC. Recently the APIC was enabled unconditionally which means that OpenSuSE no longer will boot properly. If I patch out the APIC, things work again. To address this, we need some more infrastructure in V2E to handle device synchronization between the emulator and the hypervisor. FC5 works just fine even with the APIC enabled.

There are still some larger issues (mostly SMP related):

* There's no guarantee ATM that QEMU's dynamic translator will preserve the atomicity of instructions. For SMP guests, this would be a problem if one VCPU is running on bare metal while another VCPU is running in the emulator.

* It's unclear what the best strategy is for addressing page table updates while in the emulator. There has to be some notification to the hypervisor so that the shadow code knows to invalidate any PT changes made during emulation.

* We aren't invalidating the TB cache ATM in QEMU. Strictly speaking, this isn't correct as the hypervisor could change pages that contain code that are currently in the TB cache. To make matters worse, there's some rather strange results that could occur if one VCPU is running on bare metal and modifying a page that's currently present in the TB cache.

Presumably, the SMP issues aren't really that important while simply replacing vmxassist but I'm not entirely clear on how long it will take after the initial transfer from 16 bit until SMP processors are brought online.

The current bits are available at:



Anthony Liguori

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