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[Xen-devel] RE: [VMXASSIST] Fix virt-to-phys translation routine.


  • To: "Keir Fraser" <Keir.Fraser@xxxxxxxxxxxx>
  • From: "Yang, Xiaowei" <xiaowei.yang@xxxxxxxxx>
  • Date: Tue, 26 Sep 2006 11:23:05 +0800
  • Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
  • Delivery-date: Mon, 25 Sep 2006 20:24:27 -0700
  • List-id: Xen developer discussion <xen-devel.lists.xensource.com>
  • Thread-index: AcbhGxCMEdMUc1oCTjO1xv58wBCR2g==
  • Thread-topic: RE: [VMXASSIST] Fix virt-to-phys translation routine.

Keir,
Thanks for fixing c/s 11573 bug. It was just I wanted to do. You are quicker:-)
One thing to notice:
@@ -99,6 +94,12 @@ guest_linear_to_real(uint32_t base)
                l1_mfn = ((uint64_t *)l2_mfn)[(base >> 21) & 0x1ff];
                if (!(l1_mfn & PT_ENTRY_PRESENT))
                        panic("l2 entry not present\n");
+
+               if ((oldctx.cr4 & CR4_PSE) && (l1_mfn & PDE_PS)) {
+                       l0_mfn = l1_mfn & 0x3ffe00000ULL;
+                       return l0_mfn + (base & 0x1fffff);
+               }
+
Intel manual says: 
"When PAE is enabled, the 2-MByte page size is selected by setting the page 
size (PS) flag in a page-directory entry. The PSE flag in control register CR4 
has no affect on the page size when PAE is enabled.
So condition (oldctx.cr4 & CR4_PSE) should be not needed.

Thanks, 
Xiaowei 


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