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[Xen-devel] Custom Hardware Acceleration

Hi all,
I am exploring the possibility of designing a custom hardware acceleration solution using an ASIC or an FPGA to accelerate some part of Xen. Basically, I am looking for some part of the code that could be built in hardware to make it faster. Does anybody know where I could get some statistics on the code, such as the most called functions, the most parallelizable functions, etc... If you could think of something that would be useful in HW I would be very interested to know.

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