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RE: [Xen-devel] [PATCH][VT] Clear the pending interrupt on shared page when PIC initialized


  • To: "Keir Fraser" <Keir.Fraser@xxxxxxxxxxxx>
  • From: "Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>
  • Date: Tue, 13 Sep 2005 10:40:40 +0800
  • Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
  • Delivery-date: Tue, 13 Sep 2005 02:38:36 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xensource.com>
  • Thread-index: AcW3v9BUKTvQtuRURAeRP/rzwV6VRQASkw+A
  • Thread-topic: [Xen-devel] [PATCH][VT] Clear the pending interrupt on shared page when PIC initialized

Keir Fraser wrote:
> On 12 Sep 2005, at 12:11, Jiang, Yunhong wrote:
> 
>> This patch works for following scenerio:
>> 1) The BIOS set the irq base to 0x20, and then interrupt is injected
>> through shared page. 2) The OS disable interurpt , and reset the PIC
>> with ICW1~ICW4. In this process, it changes the irq base for PIC
>> from 0x20 to 0x30 through ICW2.
> 
> Okay, thanks for the clarification and I see why the PIT bart is
> needed now. But, in the PIC code, wouldn't hanging the reset off of
> cpu_reset_interrupt() make more sense?

Yes, you are right that adding a new hook is not a good idea. 
And how about place it on the pic_reset? 
1) I think the  cpu_reset_interrupt() is a common API on qemu for
hardware interrupt/exception etc,while clear the shared page is just for
hardware interrupt. Of course, this function is currently used just for
hardware interrupt since qemu works as a device model :) But change here
may cause following code on cpu_reset_interrupt().
        if ( mask == CPU_INTERRUPT_HARD)
             ......clear the shared page...

2) I think the pic_intr filed on shared page is something like IRR on
pic device model, and can be logically treated as part of PIC device
model. So it make sense to clear it on pic_reset() just like clear IRR
there.

How do you think about this?


Thanks
Yunhong Jiang
> 
>   -- Keir


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