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Re: [Xen-devel] HPET/PIT timer accuracy




On 1 Aug 2005, at 13:17, Petersson, Mats wrote:

You have to consider that the HPET and TSC are both driven by a separate
PLL that is based of some sort of crystal/oscillator. These are often
not as precise as we'd want them to be. If you do a google with "crystal
oscillator ppm" (or some such), you will find that most of these are
within the 50-100 ppm ranges [these are the guaranteed values, which
probably means that the typical is around 25-50 ppm, much along the
lines of your findings]. If you want more precise crystals than that,
you'll be looking at expensive stuff, and when you want less than around 10 ppm, you're probably looking at temperature controlled ones (aka oven oscillators). They are both expensive and bulky, and very unlikely to be
found on the motherboard.

Those variations of up to 100ppm are primarily composed of two factors which I can definitely discount from my own tests: drift due to temperature change, and frequency tolerance. Where a separate frequency tolerance figure is not given, that is often folded into the overall stability figure: I know that can be 100ppm for a chipset crystal. And that'll be why a 2ppm clock generator is so expensive and bulky: tolerance is hard to achieve, and drift is hard to compensate for over a wide temperature range (that circuitry is where the bulk comes from).

*However* I am talking about frequency jitter at 1Hz: any constant deviation from the frequency stamped on the can, due to 'tolerances', can obviously be discounted. Also, at 1Hz temperature changes will be negligible, and the jitter continues at the same magnitude even when the machine has warmed up and reached a steady temperature.

A crystal simply shouldn't jitter at that frequency, all external factors held constant. It's resonating at its natural frequency (or some harmonic) after all.

 -- Keir


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