# HG changeset patch
# User Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
# Node ID 305751a5281e12537a6485d74ac9f53a73ee8816
# Parent 177007615848aa444b0ccb4f5846ba74e67ac003
[XEN][POWERPC] fix some hard tabs that snuck by
Signed-off-by: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
---
xen/arch/powerpc/external.c | 22 ++++----
xen/arch/powerpc/mpic.c | 118 +++++++++++++++++++++----------------------
xen/arch/powerpc/mpic_init.c | 24 ++++----
xen/arch/powerpc/setup.c | 12 ++--
xen/arch/powerpc/smp.c | 81 ++++++++++++++---------------
5 files changed, 129 insertions(+), 128 deletions(-)
diff -r 177007615848 -r 305751a5281e xen/arch/powerpc/external.c
--- a/xen/arch/powerpc/external.c Wed Nov 22 16:09:28 2006 -0500
+++ b/xen/arch/powerpc/external.c Wed Nov 22 16:29:25 2006 -0500
@@ -83,14 +83,14 @@ void do_external(struct cpu_user_regs *r
vec = xen_mpic_get_irq(regs);
if (vector_is_ipi(vec)) {
- /* do_IRQ is fundamentally broken for reliable IPI delivery. */
- irq_desc_t *desc = &irq_desc[vec];
- regs->entry_vector = vec;
- spin_lock(&desc->lock);
- desc->handler->ack(vec);
- desc->action->handler(vector_to_irq(vec), desc->action->dev_id, regs);
- desc->handler->end(vec);
- spin_unlock(&desc->lock);
+ /* do_IRQ is fundamentally broken for reliable IPI delivery. */
+ irq_desc_t *desc = &irq_desc[vec];
+ regs->entry_vector = vec;
+ spin_lock(&desc->lock);
+ desc->handler->ack(vec);
+ desc->action->handler(vector_to_irq(vec), desc->action->dev_id, regs);
+ desc->handler->end(vec);
+ spin_unlock(&desc->lock);
} else if (vec != -1) {
DBG("EE:0x%lx isrc: %d\n", regs->msr, vec);
regs->entry_vector = vec;
@@ -271,10 +271,10 @@ void send_IPI_mask(cpumask_t mask, int v
switch(vector) {
case CALL_FUNCTION_VECTOR:
case EVENT_CHECK_VECTOR:
- break;
+ break;
default:
- BUG();
- return;
+ BUG();
+ return;
}
BUG_ON(NR_CPUS > bits);
diff -r 177007615848 -r 305751a5281e xen/arch/powerpc/mpic.c
--- a/xen/arch/powerpc/mpic.c Wed Nov 22 16:09:28 2006 -0500
+++ b/xen/arch/powerpc/mpic.c Wed Nov 22 16:29:25 2006 -0500
@@ -15,15 +15,15 @@
/* XXX Xen hacks ... */
/* make this generic */
-#define le32_to_cpu(x) \
-({ \
- __u32 __x = (x); \
- ((__u32)( \
- (((__u32)(__x) & (__u32)0x000000ffUL) << 24) | \
- (((__u32)(__x) & (__u32)0x0000ff00UL) << 8) | \
- (((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | \
- (((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); \
-})
+#define le32_to_cpu(x) \
+ ({ \
+ __u32 __x = (x); \
+ ((__u32)( \
+ (((__u32)(__x) & (__u32)0x000000ffUL) << 24) | \
+ (((__u32)(__x) & (__u32)0x0000ff00UL) << 8) | \
+ (((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | \
+ (((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); \
+ })
#define alloc_bootmem(x) xmalloc_bytes(x)
@@ -117,7 +117,7 @@ static DEFINE_SPINLOCK(mpic_lock);
static inline u32 _mpic_read(unsigned int be, volatile u32 __iomem *base,
- unsigned int reg)
+ unsigned int reg)
{
if (be)
return in_be32(base + (reg >> 2));
@@ -126,7 +126,7 @@ static inline u32 _mpic_read(unsigned in
}
static inline void _mpic_write(unsigned int be, volatile u32 __iomem *base,
- unsigned int reg, u32 value)
+ unsigned int reg, u32 value)
{
if (be)
out_be32(base + (reg >> 2), value);
@@ -177,17 +177,17 @@ static inline u32 _mpic_irq_read(struct
unsigned int idx = src_no & mpic->isu_mask;
return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu],
- reg + (idx * MPIC_IRQ_STRIDE));
+ reg + (idx * MPIC_IRQ_STRIDE));
}
static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
- unsigned int reg, u32 value)
+ unsigned int reg, u32 value)
{
unsigned int isu = src_no >> mpic->isu_shift;
unsigned int idx = src_no & mpic->isu_mask;
_mpic_write(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu],
- reg + (idx * MPIC_IRQ_STRIDE), value);
+ reg + (idx * MPIC_IRQ_STRIDE), value);
}
#define mpic_read(b,r) _mpic_read(mpic->flags &
MPIC_BIG_ENDIAN,(b),(r))
@@ -252,7 +252,7 @@ static inline void mpic_ht_end_irq(struc
}
static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
- unsigned int irqflags)
+ unsigned int irqflags)
{
struct mpic_irq_fixup *fixup = &mpic->fixups[source];
unsigned long flags;
@@ -275,7 +275,7 @@ static void mpic_startup_ht_interrupt(st
}
static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
- unsigned int irqflags)
+ unsigned int irqflags)
{
struct mpic_irq_fixup *fixup = &mpic->fixups[source];
unsigned long flags;
@@ -296,7 +296,7 @@ static void mpic_shutdown_ht_interrupt(s
}
static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
- unsigned int devfn, u32 vdid)
+ unsigned int devfn, u32 vdid)
{
int i, irq, n;
u8 __iomem *base;
@@ -476,8 +476,8 @@ static void mpic_enable_irq(unsigned int
DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
- mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) &
- ~MPIC_VECPRI_MASK);
+ mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) &
+ ~MPIC_VECPRI_MASK);
/* make sure mask gets to controller before we return to user */
do {
@@ -523,8 +523,8 @@ static void mpic_disable_irq(unsigned in
DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
- mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
- MPIC_VECPRI_MASK);
+ mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
+ MPIC_VECPRI_MASK);
/* make sure mask gets to controller before we return to user */
do {
@@ -614,7 +614,7 @@ static void mpic_set_affinity(unsigned i
cpus_and(tmp, cpumask, cpu_online_map);
mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_DESTINATION,
- mpic_physmask(cpus_addr(tmp)[0]));
+ mpic_physmask(cpus_addr(tmp)[0]));
}
@@ -624,14 +624,14 @@ static void mpic_set_affinity(unsigned i
struct mpic * __init mpic_alloc(unsigned long phys_addr,
- unsigned int flags,
- unsigned int isu_size,
- unsigned int irq_offset,
- unsigned int irq_count,
- unsigned int ipi_offset,
- unsigned char *senses,
- unsigned int senses_count,
- const char *name)
+ unsigned int flags,
+ unsigned int isu_size,
+ unsigned int irq_offset,
+ unsigned int irq_count,
+ unsigned int ipi_offset,
+ unsigned char *senses,
+ unsigned int senses_count,
+ const char *name)
{
struct mpic *mpic;
u32 reg;
@@ -678,8 +678,8 @@ struct mpic * __init mpic_alloc(unsigned
/* Reset */
if (flags & MPIC_WANTS_RESET) {
mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0,
- mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
- | MPIC_GREG_GCONF_RESET);
+ mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
+ | MPIC_GREG_GCONF_RESET);
while( mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
& MPIC_GREG_GCONF_RESET)
mb();
@@ -691,15 +691,15 @@ struct mpic * __init mpic_alloc(unsigned
*/
reg = mpic_read(mpic->gregs, MPIC_GREG_FEATURE_0);
mpic->num_cpus = ((reg & MPIC_GREG_FEATURE_LAST_CPU_MASK)
- >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
+ >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
if (isu_size == 0)
mpic->num_sources = ((reg & MPIC_GREG_FEATURE_LAST_SRC_MASK)
- >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
+ >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
/* Map the per-CPU registers */
for (i = 0; i < mpic->num_cpus; i++) {
mpic->cpuregs[i] = ioremap(phys_addr + MPIC_CPU_BASE +
- i * MPIC_CPU_STRIDE, 0x1000);
+ i * MPIC_CPU_STRIDE, 0x1000);
BUG_ON(mpic->cpuregs[i] == NULL);
}
@@ -707,7 +707,7 @@ struct mpic * __init mpic_alloc(unsigned
if (mpic->isu_size == 0) {
mpic->isu_size = mpic->num_sources;
mpic->isus[0] = ioremap(phys_addr + MPIC_IRQ_BASE,
- MPIC_IRQ_STRIDE * mpic->isu_size);
+ MPIC_IRQ_STRIDE * mpic->isu_size);
BUG_ON(mpic->isus[0] == NULL);
}
mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
@@ -743,7 +743,7 @@ struct mpic * __init mpic_alloc(unsigned
}
void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
- unsigned long phys_addr)
+ unsigned long phys_addr)
{
unsigned int isu_first = isu_num * mpic->isu_size;
@@ -755,7 +755,7 @@ void __init mpic_assign_isu(struct mpic
}
void __init mpic_setup_cascade(unsigned int irq, mpic_cascade_t handler,
- void *data)
+ void *data)
{
struct mpic *mpic = mpic_find(irq, NULL);
unsigned long flags;
@@ -790,20 +790,20 @@ void __init mpic_init(struct mpic *mpic)
/* Initialize timers: just disable them all */
for (i = 0; i < 4; i++) {
mpic_write(mpic->tmregs,
- i * MPIC_TIMER_STRIDE + MPIC_TIMER_DESTINATION, 0);
+ i * MPIC_TIMER_STRIDE + MPIC_TIMER_DESTINATION, 0);
mpic_write(mpic->tmregs,
- i * MPIC_TIMER_STRIDE + MPIC_TIMER_VECTOR_PRI,
- MPIC_VECPRI_MASK |
- (MPIC_VEC_TIMER_0 + i));
+ i * MPIC_TIMER_STRIDE + MPIC_TIMER_VECTOR_PRI,
+ MPIC_VECPRI_MASK |
+ (MPIC_VEC_TIMER_0 + i));
}
/* Initialize IPIs to our reserved vectors and mark them disabled for
now */
mpic_test_broken_ipi(mpic);
for (i = 0; i < 4; i++) {
mpic_ipi_write(i,
- MPIC_VECPRI_MASK |
- (10 << MPIC_VECPRI_PRIORITY_SHIFT) |
- (MPIC_VEC_IPI_0 + i));
+ MPIC_VECPRI_MASK |
+ (10 << MPIC_VECPRI_PRIORITY_SHIFT) |
+ (MPIC_VEC_IPI_0 + i));
#ifdef CONFIG_SMP
if (!(mpic->flags & MPIC_PRIMARY))
continue;
@@ -850,7 +850,7 @@ void __init mpic_init(struct mpic *mpic)
#ifdef CONFIG_MPIC_BROKEN_U3
if (mpic_is_ht_interrupt(mpic, i)) {
vecpri &= ~(MPIC_VECPRI_SENSE_MASK |
- MPIC_VECPRI_POLARITY_MASK);
+ MPIC_VECPRI_POLARITY_MASK);
vecpri |= MPIC_VECPRI_POLARITY_POSITIVE;
}
#else
@@ -864,7 +864,7 @@ void __init mpic_init(struct mpic *mpic)
/* init hw */
mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri);
mpic_irq_write(i, MPIC_IRQ_DESTINATION,
- 1 << hard_smp_processor_id());
+ 1 << hard_smp_processor_id());
/* init linux descriptors */
if (i < mpic->irq_count) {
@@ -878,8 +878,8 @@ void __init mpic_init(struct mpic *mpic)
/* Disable 8259 passthrough */
mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0,
- mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
- | MPIC_GREG_GCONF_8259_PTHROU_DIS);
+ mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
+ | MPIC_GREG_GCONF_8259_PTHROU_DIS);
/* Set current processor priority to 0 */
mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
@@ -899,12 +899,12 @@ void mpic_irq_set_priority(unsigned int
reg = mpic_ipi_read(irq - mpic->ipi_offset) &
~MPIC_VECPRI_PRIORITY_MASK;
mpic_ipi_write(irq - mpic->ipi_offset,
- reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
+ reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
} else {
reg = mpic_irq_read(irq - mpic->irq_offset,MPIC_IRQ_VECTOR_PRI)
& ~MPIC_VECPRI_PRIORITY_MASK;
mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI,
- reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
+ reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
}
spin_unlock_irqrestore(&mpic_lock, flags);
}
@@ -947,7 +947,7 @@ void mpic_setup_this_cpu(void)
if (distribute_irqs) {
for (i = 0; i < mpic->num_sources ; i++)
mpic_irq_write(i, MPIC_IRQ_DESTINATION,
- mpic_irq_read(i, MPIC_IRQ_DESTINATION) | msk);
+ mpic_irq_read(i, MPIC_IRQ_DESTINATION) | msk);
}
/* Set current processor priority to 0 */
@@ -992,7 +992,7 @@ void mpic_teardown_this_cpu(int secondar
/* let the mpic know we don't want intrs. */
for (i = 0; i < mpic->num_sources ; i++)
mpic_irq_write(i, MPIC_IRQ_DESTINATION,
- mpic_irq_read(i, MPIC_IRQ_DESTINATION) & ~msk);
+ mpic_irq_read(i, MPIC_IRQ_DESTINATION) & ~msk);
/* Set current processor priority to max */
mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0xf);
@@ -1012,7 +1012,7 @@ void mpic_send_ipi(unsigned int ipi_no,
#endif
mpic_cpu_write(MPIC_CPU_IPI_DISPATCH_0 + ipi_no * 0x10,
- mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
+ mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
}
int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs)
@@ -1040,7 +1040,7 @@ int mpic_get_one_irq(struct mpic *mpic,
return irq + mpic->irq_offset;
}
#ifdef DEBUG_IPI
- DBG("%s: ipi %d !\n", mpic->name, irq - MPIC_VEC_IPI_0);
+ DBG("%s: ipi %d !\n", mpic->name, irq - MPIC_VEC_IPI_0);
#endif
return irq - MPIC_VEC_IPI_0 + mpic->ipi_offset;
}
@@ -1066,13 +1066,13 @@ void mpic_request_ipis(void)
/* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */
request_irq(mpic->ipi_offset+0, mpic_ipi_action, SA_INTERRUPT,
- "IPI0 (call function)", mpic);
+ "IPI0 (call function)", mpic);
request_irq(mpic->ipi_offset+1, mpic_ipi_action, SA_INTERRUPT,
- "IPI1 (reschedule)", mpic);
+ "IPI1 (reschedule)", mpic);
request_irq(mpic->ipi_offset+2, mpic_ipi_action, SA_INTERRUPT,
- "IPI2 (unused)", mpic);
+ "IPI2 (unused)", mpic);
request_irq(mpic->ipi_offset+3, mpic_ipi_action, SA_INTERRUPT,
- "IPI3 (debugger break)", mpic);
+ "IPI3 (debugger break)", mpic);
printk("IPIs requested... \n");
}
diff -r 177007615848 -r 305751a5281e xen/arch/powerpc/mpic_init.c
--- a/xen/arch/powerpc/mpic_init.c Wed Nov 22 16:09:28 2006 -0500
+++ b/xen/arch/powerpc/mpic_init.c Wed Nov 22 16:29:25 2006 -0500
@@ -75,7 +75,7 @@ static unsigned long reg2(void *oft_p, o
rc = ofd_getprop(oft_p, c, "reg", &isa_reg, sizeof(isa_reg));
DBG("%s: reg property address=0x%08x size=0x%08x\n", __func__,
- isa_reg.address, isa_reg.size);
+ isa_reg.address, isa_reg.size);
return isa_reg.address;
}
@@ -93,7 +93,7 @@ static unsigned long reg1(void *oft_p, o
rc = ofd_getprop(oft_p, c, "reg", ®, sizeof(reg));
DBG("%s: reg property address=0x%08x size=0x%08x\n", __func__,
- reg.address, reg.size);
+ reg.address, reg.size);
return reg.address;
}
@@ -174,15 +174,15 @@ static unsigned long find_ranges_addr_fr
break;
case 2:
ranges_addr = (((u64)ranges[ranges_i]) << 32) |
- ranges[ranges_i + 1];
+ ranges[ranges_i + 1];
break;
case 3: /* the G5 case, how to squeeze 96 bits into 64 */
ranges_addr = (((u64)ranges[ranges_i+1]) << 32) |
- ranges[ranges_i + 2];
+ ranges[ranges_i + 2];
break;
case 4:
ranges_addr = (((u64)ranges[ranges_i+2]) << 32) |
- ranges[ranges_i + 4];
+ ranges[ranges_i + 4];
break;
default:
PANIC("#address-cells out of range\n");
@@ -267,7 +267,7 @@ static int find_mpic_canonical_probe(voi
* We select the one without an 'interrupt' property.
*/
c = ofd_node_find_by_prop(oft_p, OFD_ROOT, "device_type", mpic_type,
- sizeof(mpic_type));
+ sizeof(mpic_type));
while (c > 0) {
int int_len;
int good_mpic;
@@ -366,8 +366,8 @@ static unsigned int mpic_startup_ipi(uns
}
int request_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct cpu_user_regs *),
- unsigned long irqflags, const char * devname, void *dev_id)
+ irqreturn_t (*handler)(int, void *, struct cpu_user_regs *),
+ unsigned long irqflags, const char * devname, void *dev_id)
{
int retval;
struct irqaction *action;
@@ -375,8 +375,8 @@ int request_irq(unsigned int irq,
action = xmalloc(struct irqaction);
if (!action) {
- BUG();
- return -ENOMEM;
+ BUG();
+ return -ENOMEM;
}
/* Xen's handler prototype is slightly different than Linux's. */
@@ -388,8 +388,8 @@ int request_irq(unsigned int irq,
retval = setup_irq(irq, action);
if (retval) {
- BUG();
- xfree(action);
+ BUG();
+ xfree(action);
}
return retval;
diff -r 177007615848 -r 305751a5281e xen/arch/powerpc/setup.c
--- a/xen/arch/powerpc/setup.c Wed Nov 22 16:09:28 2006 -0500
+++ b/xen/arch/powerpc/setup.c Wed Nov 22 16:29:25 2006 -0500
@@ -1,8 +1,8 @@
/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -406,10 +406,10 @@ static void __init __start_xen(multiboot
}
init_xenheap_pages(ALIGN_UP(dom0_start, PAGE_SIZE),
- ALIGN_DOWN(dom0_start + dom0_len, PAGE_SIZE));
+ ALIGN_DOWN(dom0_start + dom0_len, PAGE_SIZE));
if (initrd_start)
init_xenheap_pages(ALIGN_UP(initrd_start, PAGE_SIZE),
- ALIGN_DOWN(initrd_start + initrd_len, PAGE_SIZE));
+ ALIGN_DOWN(initrd_start + initrd_len, PAGE_SIZE));
init_trace_bufs();
diff -r 177007615848 -r 305751a5281e xen/arch/powerpc/smp.c
--- a/xen/arch/powerpc/smp.c Wed Nov 22 16:09:28 2006 -0500
+++ b/xen/arch/powerpc/smp.c Wed Nov 22 16:29:25 2006 -0500
@@ -13,9 +13,10 @@
* along with this program; if not, write to the Free Software
* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
- * Copyright (C) IBM Corp. 2005
+ * Copyright (C) IBM Corp. 2005,2006
*
* Authors: Hollis Blanchard <hollisb@xxxxxxxxxx>
+ * Authors: Amos Waterland <apw@xxxxxxxxxx>
*/
#include <xen/cpumask.h>
@@ -32,15 +33,15 @@ void __flush_tlb_mask(cpumask_t mask, un
void __flush_tlb_mask(cpumask_t mask, unsigned long addr)
{
if (cpu_isset(smp_processor_id(), mask)) {
- cpu_clear(smp_processor_id(), mask);
- if (cpus_empty(mask)) {
- /* only local */
- if (addr == FLUSH_ALL_ADDRS)
- local_flush_tlb();
- else
- local_flush_tlb_one(addr);
- return;
- }
+ cpu_clear(smp_processor_id(), mask);
+ if (cpus_empty(mask)) {
+ /* only local */
+ if (addr == FLUSH_ALL_ADDRS)
+ local_flush_tlb();
+ else
+ local_flush_tlb_one(addr);
+ return;
+ }
}
/* if we are still here and the mask is non-empty, then we need to
* flush other TLBs so we flush em all */
@@ -57,7 +58,7 @@ void smp_send_event_check_mask(cpumask_t
int smp_call_function(void (*func) (void *info), void *info, int retry,
- int wait)
+ int wait)
{
cpumask_t allbutself = cpu_online_map;
cpu_clear(smp_processor_id(), allbutself);
@@ -105,20 +106,20 @@ int on_selected_cpus(
/* We always wait for an initiation ACK from remote CPU. */
for (t = 0; atomic_read(&call_data.started) != nr_cpus; t++) {
- if (t && t % timebase_freq == 0) {
- printk("IPI start stall: %d ACKS to %d SYNS\n",
- atomic_read(&call_data.started), nr_cpus);
- }
+ if (t && t % timebase_freq == 0) {
+ printk("IPI start stall: %d ACKS to %d SYNS\n",
+ atomic_read(&call_data.started), nr_cpus);
+ }
}
/* If told to, we wait for a completion ACK from remote CPU. */
if (wait) {
- for (t = 0; atomic_read(&call_data.finished) != nr_cpus; t++) {
- if (t > timebase_freq && t % timebase_freq == 0) {
- printk("IPI finish stall: %d ACKS to %d SYNS\n",
- atomic_read(&call_data.finished), nr_cpus);
- }
- }
+ for (t = 0; atomic_read(&call_data.finished) != nr_cpus; t++) {
+ if (t > timebase_freq && t % timebase_freq == 0) {
+ printk("IPI finish stall: %d ACKS to %d SYNS\n",
+ atomic_read(&call_data.finished), nr_cpus);
+ }
+ }
}
spin_unlock(&call_lock);
@@ -139,7 +140,7 @@ void smp_call_function_interrupt(struct
mb();
if (wait)
- atomic_inc(&call_data.finished);
+ atomic_inc(&call_data.finished);
return;
}
@@ -154,14 +155,14 @@ void smp_message_recv(int msg, struct cp
{
switch(msg) {
case CALL_FUNCTION_VECTOR:
- smp_call_function_interrupt(regs);
- break;
+ smp_call_function_interrupt(regs);
+ break;
case EVENT_CHECK_VECTOR:
smp_event_check_interrupt();
- break;
+ break;
default:
- BUG();
- break;
+ BUG();
+ break;
}
}
@@ -181,19 +182,19 @@ void ipi_torture_test(void)
cpus_clear(mask);
while (tick < 1000000) {
- for_each_online_cpu(cpu) {
- cpu_set(cpu, mask);
- before = mftb();
- on_selected_cpus(mask, debug_ipi_ack, NULL, 1, 1);
- after = mftb();
- cpus_clear(mask);
-
- delta = after - before;
- if (delta > max) max = delta;
- if (delta < min) min = delta;
- sum += delta;
- tick++;
- }
+ for_each_online_cpu(cpu) {
+ cpu_set(cpu, mask);
+ before = mftb();
+ on_selected_cpus(mask, debug_ipi_ack, NULL, 1, 1);
+ after = mftb();
+ cpus_clear(mask);
+
+ delta = after - before;
+ if (delta > max) max = delta;
+ if (delta < min) min = delta;
+ sum += delta;
+ tick++;
+ }
}
mean = sum / tick;
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