WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-ppc-devel

[XenPPC] [xenppc-unstable] [POWERPC][XEN] break out the ppc970.c functio

To: xen-ppc-devel@xxxxxxxxxxxxxxxxxxx
Subject: [XenPPC] [xenppc-unstable] [POWERPC][XEN] break out the ppc970.c functionality
From: Xen patchbot-xenppc-unstable <patchbot-xenppc-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Thu, 14 Sep 2006 15:20:37 +0000
Delivery-date: Thu, 14 Sep 2006 08:59:05 -0700
Envelope-to: www-data@xxxxxxxxxxxxxxxxxx
List-help: <mailto:xen-ppc-devel-request@lists.xensource.com?subject=help>
List-id: Xen PPC development <xen-ppc-devel.lists.xensource.com>
List-post: <mailto:xen-ppc-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-ppc-devel>, <mailto:xen-ppc-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-ppc-devel>, <mailto:xen-ppc-devel-request@lists.xensource.com?subject=unsubscribe>
Reply-to: xen-ppc-devel@xxxxxxxxxxxxxxxxxxx
Sender: xen-ppc-devel-bounces@xxxxxxxxxxxxxxxxxxx
# HG changeset patch
# User Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
# Node ID 164572d15e60079b8fe93b0f675312f5553c7163
# Parent  25442712f4cb2de72b1dd9dbdb471942c84ceca3
[POWERPC][XEN] break out the ppc970.c functionality

getting way to crowded in there.

Signed-off-by: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
---
 xen/arch/powerpc/powerpc64/Makefile              |    3 
 xen/arch/powerpc/powerpc64/ppc970.c              |   88 -----------------
 xen/arch/powerpc/powerpc64/ppc970_machinecheck.c |  116 +++++++++++++++++++++++
 xen/arch/powerpc/powerpc64/ppc970_scom.c         |  116 +++++++++++++++++++++++
 xen/include/asm-powerpc/powerpc64/ppc970-hid.h   |   98 -------------------
 xen/include/asm-powerpc/processor.h              |    1 
 6 files changed, 237 insertions(+), 185 deletions(-)

diff -r 25442712f4cb -r 164572d15e60 xen/arch/powerpc/powerpc64/Makefile
--- a/xen/arch/powerpc/powerpc64/Makefile       Thu Sep 14 10:17:23 2006 -0400
+++ b/xen/arch/powerpc/powerpc64/Makefile       Thu Sep 14 10:20:16 2006 -0400
@@ -6,6 +6,9 @@ obj-y += io.o
 obj-y += io.o
 obj-y += memcpy.o
 obj-y += ppc970.o
+obj-y += ppc970_machinecheck.o
+obj-y += ppc970_scom.o
 obj-y += prom_call.o
 obj-y += string.o
 obj-y += traps.o
+
diff -r 25442712f4cb -r 164572d15e60 xen/arch/powerpc/powerpc64/ppc970.c
--- a/xen/arch/powerpc/powerpc64/ppc970.c       Thu Sep 14 10:17:23 2006 -0400
+++ b/xen/arch/powerpc/powerpc64/ppc970.c       Thu Sep 14 10:20:16 2006 -0400
@@ -112,19 +112,6 @@ int cpu_io_mfn(ulong mfn)
     return 0;
 }
 
-#ifdef DEBUG
-static void scom_init(void)
-{
-    write_scom(SCOM_AMCS_AND_MASK, 0);
-    
-    printk("scom MCKE: 0x%016lx\n", read_scom(SCOM_CMCE));
-    write_scom(SCOM_CMCE, ~0UL);
-    printk("scom MCKE: 0x%016lx\n", read_scom(SCOM_CMCE));
-}
-#else
-#define scom_init()
-#endif
-
 static u64 cpu0_hids[6];
 static u64 cpu0_hior;
 
@@ -243,7 +230,7 @@ void cpu_initialize(int cpuid)
               "to be larger that NR_CPUS(%u)\n",
               mfpir(), NR_CPUS);
 
-    scom_init();
+    cpu_scom_init();
 
     /* initialize the SLB */
 #ifdef DEBUG
@@ -287,76 +274,3 @@ void load_cpu_sprs(struct vcpu *v)
 {
     mthid4(v->arch.cpu.hid4.word);
 }
-
-int cpu_machinecheck(struct cpu_user_regs *regs)
-{
-    int recover = 0;
-    u32 dsisr = mfdsisr();
-
-    if (regs->msr & MCK_SRR1_RI)
-        recover = 1;
-
-    printk("MACHINE CHECK: %s Recoverable\n", recover ? "IS": "NOT");
-    if (mck_cpu_stats[mfpir()] != 0)
-        printk("While in CI IO\n");
-
-    printk("SRR1: 0x%016lx\n", regs->msr);
-    if (regs->msr & MCK_SRR1_INSN_FETCH_UNIT)
-        printk("42: Exception caused by Instruction Fetch Unit (IFU) "
-               "detection of a hardware uncorrectable error (UE).\n");
-
-    if (regs->msr & MCK_SRR1_LOAD_STORE)
-        printk("43: Exception caused by load/store detection of error "
-               "(see DSISR)\n");
-
-    switch (regs->msr & MCK_SRR1_CAUSE_MASK) {
-    case MCK_SRR1_CAUSE_SLB_PAR:
-        printk("0b01: Exception caused by an SLB parity error detected "
-               "while translating an instruction fetch address.\n");
-        break;
-    case MCK_SRR1_CAUSE_TLB_PAR:
-        printk("0b10: Exception caused by a TLB parity error detected "
-               "while translating an instruction fetch address.\n");
-        break;
-    case MCK_SRR1_CAUSE_UE:
-        printk("0b11: Exception caused by a hardware uncorrectable "
-               "error (UE) detected while doing a reload of an "
-               "instruction-fetch TLB tablewalk.\n");
-        break;
-    default:
-        break;
-    }
-
-    printk("\nDSIDR: 0x%08x\n", dsisr);
-    if (dsisr & MCK_DSISR_UE)
-        printk("16: Exception caused by a UE deferred error "
-               "(DAR is undefined).\n");
-    
-    if (dsisr & MCK_DSISR_UE_TABLE_WALK)
-        printk("17: Exception caused by a UE deferred error "
-               "during a tablewalk (D-side).\n"); 
-
-    if (dsisr & MCK_DSISR_L1_DCACHE_PAR)
-        printk("18: Exception was caused by a software recoverable "
-               "parity error in the L1 D-cache.\n");
-
-    if (dsisr & MCK_DSISR_L1_DCACHE_TAG_PAR)
-        printk("19: Exception was caused by a software recoverable "
-               "parity error in the L1 D-cache tag.\n");
-
-    if (dsisr & MCK_DSISR_D_ERAT_PAR)
-        printk("20: Exception was caused by a software recoverable parity "
-               "error in the D-ERAT.\n");
-        
-    if (dsisr & MCK_DSISR_TLB_PAR)
-        printk("21: Exception was caused by a software recoverable parity "
-               "error in the TLB.\n");
-
-    if (dsisr & MCK_DSISR_SLB_PAR)
-        printk("23: Exception was caused by an SLB parity error (may not be "
-               "recoverable). This condition could occur if the "
-               "effective segment ID (ESID) fields of two or more SLB "
-               "entries contain the same value.");
-
-    return 0; /* for now lets not recover; */
-}
diff -r 25442712f4cb -r 164572d15e60 
xen/include/asm-powerpc/powerpc64/ppc970-hid.h
--- a/xen/include/asm-powerpc/powerpc64/ppc970-hid.h    Thu Sep 14 10:17:23 
2006 -0400
+++ b/xen/include/asm-powerpc/powerpc64/ppc970-hid.h    Thu Sep 14 10:20:16 
2006 -0400
@@ -141,102 +141,4 @@ union hid5 {
     ulong word;
 };
 
-#define MCK_SRR1_INSN_FETCH_UNIT    0x0000000000200000 /* 42 */
-#define MCK_SRR1_LOAD_STORE         0x0000000000100000 /* 43 */
-#define MCK_SRR1_CAUSE_MASK         0x00000000000c0000 /* 44:45 */
-#define MCK_SRR1_CAUSE_NONE         0x0000000000000000 /* 0b00 */
-#define MCK_SRR1_CAUSE_SLB_PAR      0x0000000000040000 /* 0b01 */
-#define MCK_SRR1_CAUSE_TLB_PAR      0x0000000000080000 /* 0b10 */
-#define MCK_SRR1_CAUSE_UE           0x00000000000c0000 /* 0b11 */
-#define MCK_SRR1_RI                 MSR_RI
-
-#define MCK_DSISR_UE                0x00008000 /* 16 */
-#define MCK_DSISR_UE_TABLE_WALK     0x00004000 /* 17 */
-#define MCK_DSISR_L1_DCACHE_PAR     0x00002000 /* 18 */
-#define MCK_DSISR_L1_DCACHE_TAG_PAR 0x00001000 /* 19 */
-#define MCK_DSISR_D_ERAT_PAR        0x00000800 /* 20 */
-#define MCK_DSISR_TLB_PAR           0x00000400 /* 21 */
-#define MCK_DSISR_SLB_PAR           0x00000100 /* 23 */
-
-#define SPRN_SCOMC 276
-#define SPRN_SCOMD 277
-
-static inline void mtscomc(ulong scomc)
-{
-    __asm__ __volatile__ ("mtspr %1, %0" : : "r" (scomc), "i"(SPRN_SCOMC));
-}
-
-static inline ulong mfscomc(void)
-{
-    ulong scomc;
-    __asm__ __volatile__ ("mfspr %0, %1" : "=r" (scomc): "i"(SPRN_SCOMC));
-    return scomc;
-}
-
-static inline void mtscomd(ulong scomd)
-{
-    __asm__ __volatile__ ("mtspr %1, %0" : : "r" (scomd), "i"(SPRN_SCOMD));
-}
-
-static inline ulong mfscomd(void)
-{
-    ulong scomd;
-    __asm__ __volatile__ ("mfspr %0, %1" : "=r" (scomd): "i"(SPRN_SCOMD));
-    return scomd;
-}
-
-union scomc {
-    struct scomc_bits {
-        ulong _reserved_0_31: 32;
-        ulong addr:           16;
-        ulong RW:              1;
-        ulong _reserved_49_55: 7;
-        ulong _reserved_56_57: 2;
-        ulong addr_error:      1;
-        ulong iface_error:     1;
-        ulong disabled:        1;
-        ulong _reserved_61_62: 2;
-        ulong failure:         1;
-    } bits;
-    ulong word;
-};
-
-
-static inline ulong read_scom(ulong addr)
-{
-    union scomc c;
-    ulong d;
-
-    c.word = 0;
-    c.bits.addr = addr;
-    c.bits.RW = 0;
-
-    mtscomc(c.word);
-    d = mfscomd();
-    c.word = mfscomc();
-    if (c.bits.failure)
-        panic("scom status: 0x%016lx\n", c.word);
-
-    return d;
-}
-
-static inline void write_scom(ulong addr, ulong val)
-{
-    union scomc c;
-
-    c.word = 0;
-    c.bits.addr = addr;
-    c.bits.RW = 0;
-
-    mtscomd(val);
-    mtscomc(c.word);
-    c.word = mfscomc();
-    if (c.bits.failure)
-        panic("scom status: 0x%016lx\n", c.word);
-}
-
-#define SCOM_AMCS_REG      0x022601
-#define SCOM_AMCS_AND_MASK 0x022700
-#define SCOM_AMCS_OR_MASK  0x022800
-#define SCOM_CMCE          0x030901
 #endif
diff -r 25442712f4cb -r 164572d15e60 xen/include/asm-powerpc/processor.h
--- a/xen/include/asm-powerpc/processor.h       Thu Sep 14 10:17:23 2006 -0400
+++ b/xen/include/asm-powerpc/processor.h       Thu Sep 14 10:20:16 2006 -0400
@@ -38,6 +38,7 @@ struct vcpu;
 struct vcpu;
 struct cpu_user_regs;
 extern int cpu_machinecheck(struct cpu_user_regs *);
+extern int cpu_scom_init(void);
 extern void show_registers(struct cpu_user_regs *);
 extern void show_execution_state(struct cpu_user_regs *);
 extern void show_backtrace(ulong sp, ulong lr, ulong pc);
diff -r 25442712f4cb -r 164572d15e60 
xen/arch/powerpc/powerpc64/ppc970_machinecheck.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/arch/powerpc/powerpc64/ppc970_machinecheck.c  Thu Sep 14 10:20:16 
2006 -0400
@@ -0,0 +1,116 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright (C) IBM Corp. 2006
+ *
+ * Authors: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
+ */
+
+#include <xen/config.h>
+#include <xen/types.h>
+#include <xen/lib.h>
+#include <public/xen.h>
+#include <asm/processor.h>
+#include <asm/percpu.h>
+
+#define MCK_SRR1_INSN_FETCH_UNIT    0x0000000000200000 /* 42 */
+#define MCK_SRR1_LOAD_STORE         0x0000000000100000 /* 43 */
+#define MCK_SRR1_CAUSE_MASK         0x00000000000c0000 /* 44:45 */
+#define MCK_SRR1_CAUSE_NONE         0x0000000000000000 /* 0b00 */
+#define MCK_SRR1_CAUSE_SLB_PAR      0x0000000000040000 /* 0b01 */
+#define MCK_SRR1_CAUSE_TLB_PAR      0x0000000000080000 /* 0b10 */
+#define MCK_SRR1_CAUSE_UE           0x00000000000c0000 /* 0b11 */
+#define MCK_SRR1_RI                 MSR_RI
+
+#define MCK_DSISR_UE                0x00008000 /* 16 */
+#define MCK_DSISR_UE_TABLE_WALK     0x00004000 /* 17 */
+#define MCK_DSISR_L1_DCACHE_PAR     0x00002000 /* 18 */
+#define MCK_DSISR_L1_DCACHE_TAG_PAR 0x00001000 /* 19 */
+#define MCK_DSISR_D_ERAT_PAR        0x00000800 /* 20 */
+#define MCK_DSISR_TLB_PAR           0x00000400 /* 21 */
+#define MCK_DSISR_SLB_PAR           0x00000100 /* 23 */
+
+int cpu_machinecheck(struct cpu_user_regs *regs)
+{
+    int recover = 0;
+    u32 dsisr = mfdsisr();
+
+    if (regs->msr & MCK_SRR1_RI)
+        recover = 1;
+
+    printk("MACHINE CHECK: %s Recoverable\n", recover ? "IS": "NOT");
+    if (mck_cpu_stats[mfpir()] != 0)
+        printk("While in CI IO\n");
+
+    printk("SRR1: 0x%016lx\n", regs->msr);
+    if (regs->msr & MCK_SRR1_INSN_FETCH_UNIT)
+        printk("42: Exception caused by Instruction Fetch Unit (IFU) "
+               "detection of a hardware uncorrectable error (UE).\n");
+
+    if (regs->msr & MCK_SRR1_LOAD_STORE)
+        printk("43: Exception caused by load/store detection of error "
+               "(see DSISR)\n");
+
+    switch (regs->msr & MCK_SRR1_CAUSE_MASK) {
+    case MCK_SRR1_CAUSE_SLB_PAR:
+        printk("0b01: Exception caused by an SLB parity error detected "
+               "while translating an instruction fetch address.\n");
+        break;
+    case MCK_SRR1_CAUSE_TLB_PAR:
+        printk("0b10: Exception caused by a TLB parity error detected "
+               "while translating an instruction fetch address.\n");
+        break;
+    case MCK_SRR1_CAUSE_UE:
+        printk("0b11: Exception caused by a hardware uncorrectable "
+               "error (UE) detected while doing a reload of an "
+               "instruction-fetch TLB tablewalk.\n");
+        break;
+    default:
+        break;
+    }
+
+    printk("\nDSIDR: 0x%08x\n", dsisr);
+    if (dsisr & MCK_DSISR_UE)
+        printk("16: Exception caused by a UE deferred error "
+               "(DAR is undefined).\n");
+    
+    if (dsisr & MCK_DSISR_UE_TABLE_WALK)
+        printk("17: Exception caused by a UE deferred error "
+               "during a tablewalk (D-side).\n"); 
+
+    if (dsisr & MCK_DSISR_L1_DCACHE_PAR)
+        printk("18: Exception was caused by a software recoverable "
+               "parity error in the L1 D-cache.\n");
+
+    if (dsisr & MCK_DSISR_L1_DCACHE_TAG_PAR)
+        printk("19: Exception was caused by a software recoverable "
+               "parity error in the L1 D-cache tag.\n");
+
+    if (dsisr & MCK_DSISR_D_ERAT_PAR)
+        printk("20: Exception was caused by a software recoverable parity "
+               "error in the D-ERAT.\n");
+        
+    if (dsisr & MCK_DSISR_TLB_PAR)
+        printk("21: Exception was caused by a software recoverable parity "
+               "error in the TLB.\n");
+
+    if (dsisr & MCK_DSISR_SLB_PAR)
+        printk("23: Exception was caused by an SLB parity error (may not be "
+               "recoverable). This condition could occur if the "
+               "effective segment ID (ESID) fields of two or more SLB "
+               "entries contain the same value.");
+
+    return 0; /* for now lets not recover; */
+}
diff -r 25442712f4cb -r 164572d15e60 xen/arch/powerpc/powerpc64/ppc970_scom.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/arch/powerpc/powerpc64/ppc970_scom.c  Thu Sep 14 10:20:16 2006 -0400
@@ -0,0 +1,116 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright (C) IBM Corp. 2006
+ *
+ * Authors: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
+ */
+
+#include <xen/config.h>
+#include <xen/types.h>
+#include <xen/lib.h>
+
+#define SPRN_SCOMC 276
+#define SPRN_SCOMD 277
+
+static inline void mtscomc(ulong scomc)
+{
+    __asm__ __volatile__ ("mtspr %1, %0" : : "r" (scomc), "i"(SPRN_SCOMC));
+}
+
+static inline ulong mfscomc(void)
+{
+    ulong scomc;
+    __asm__ __volatile__ ("mfspr %0, %1" : "=r" (scomc): "i"(SPRN_SCOMC));
+    return scomc;
+}
+
+static inline void mtscomd(ulong scomd)
+{
+    __asm__ __volatile__ ("mtspr %1, %0" : : "r" (scomd), "i"(SPRN_SCOMD));
+}
+
+static inline ulong mfscomd(void)
+{
+    ulong scomd;
+    __asm__ __volatile__ ("mfspr %0, %1" : "=r" (scomd): "i"(SPRN_SCOMD));
+    return scomd;
+}
+
+union scomc {
+    struct scomc_bits {
+        ulong _reserved_0_31: 32;
+        ulong addr:           16;
+        ulong RW:              1;
+        ulong _reserved_49_55: 7;
+        ulong _reserved_56_57: 2;
+        ulong addr_error:      1;
+        ulong iface_error:     1;
+        ulong disabled:        1;
+        ulong _reserved_61_62: 2;
+        ulong failure:         1;
+    } bits;
+    ulong word;
+};
+
+
+static inline ulong read_scom(ulong addr)
+{
+    union scomc c;
+    ulong d;
+
+    c.word = 0;
+    c.bits.addr = addr;
+    c.bits.RW = 0;
+
+    mtscomc(c.word);
+    d = mfscomd();
+    c.word = mfscomc();
+    if (c.bits.failure)
+        panic("scom status: 0x%016lx\n", c.word);
+
+    return d;
+}
+
+static inline void write_scom(ulong addr, ulong val)
+{
+    union scomc c;
+
+    c.word = 0;
+    c.bits.addr = addr;
+    c.bits.RW = 0;
+
+    mtscomd(val);
+    mtscomc(c.word);
+    c.word = mfscomc();
+    if (c.bits.failure)
+        panic("scom status: 0x%016lx\n", c.word);
+}
+
+#define SCOM_AMCS_REG      0x022601
+#define SCOM_AMCS_AND_MASK 0x022700
+#define SCOM_AMCS_OR_MASK  0x022800
+#define SCOM_CMCE          0x030901
+
+void cpu_scom_init(void)
+{
+#ifdef not_yet    
+    write_scom(SCOM_AMCS_AND_MASK, 0);
+    
+    printk("scom MCKE: 0x%016lx\n", read_scom(SCOM_CMCE));
+    write_scom(SCOM_CMCE, ~0UL);
+    printk("scom MCKE: 0x%016lx\n", read_scom(SCOM_CMCE));
+#endif
+}

_______________________________________________
Xen-ppc-devel mailing list
Xen-ppc-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-ppc-devel

<Prev in Thread] Current Thread [Next in Thread>
  • [XenPPC] [xenppc-unstable] [POWERPC][XEN] break out the ppc970.c functionality, Xen patchbot-xenppc-unstable <=