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xen-ppc-devel
[XenPPC] [xenppc-unstable] [powerpc] support additional interrupt contro
# HG changeset patch
# User kaf24@xxxxxxxxxxxxxxxxxxxx
# Node ID 129e981a770013543c96b73eff338e4801badd4d
# Parent d51a5ca0fa99bdd44cee760e8e517d964959545a
[powerpc] support additional interrupt controller types in xen/arch/x86/irq.c
PowerPC #includes xen/arch/x86/irq.c, so we need to support MPIC interrupt
controllers here.
From: Hollis Blanchard <hollisb@xxxxxxxxxx>
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
---
xen/arch/x86/irq.c | 15 +++++++++++----
xen/include/xen/irq.h | 1 +
2 files changed, 12 insertions(+), 4 deletions(-)
diff -r d51a5ca0fa99 -r 129e981a7700 xen/arch/x86/irq.c
--- a/xen/arch/x86/irq.c Fri Jul 14 10:23:52 2006 +0100
+++ b/xen/arch/x86/irq.c Fri Jul 14 10:31:36 2006 +0100
@@ -387,16 +387,23 @@ int pirq_acktype(int irq)
if ( !strcmp(desc->handler->typename, "IO-APIC-edge") )
return ACKTYPE_NONE;
- /* Legacy PIC interrupts can be acknowledged from any CPU. */
- if ( !strcmp(desc->handler->typename, "XT-PIC") )
- return ACKTYPE_UNMASK;
-
/*
* Level-triggered IO-APIC interrupts need to be acknowledged on the CPU
* on which they were received. This is because we tickle the LAPIC to EOI.
*/
if ( !strcmp(desc->handler->typename, "IO-APIC-level") )
return ioapic_ack_new ? ACKTYPE_EOI : ACKTYPE_UNMASK;
+
+ /* Legacy PIC interrupts can be acknowledged from any CPU. */
+ if ( !strcmp(desc->handler->typename, "XT-PIC") )
+ return ACKTYPE_UNMASK;
+
+ if ( strstr(desc->handler->typename, "MPIC") )
+ {
+ if ( desc->status & IRQ_LEVEL )
+ return (desc->status & IRQ_PER_CPU) ? ACKTYPE_EOI : ACKTYPE_UNMASK;
+ return ACKTYPE_NONE; /* edge-triggered => no final EOI */
+ }
BUG();
return 0;
diff -r d51a5ca0fa99 -r 129e981a7700 xen/include/xen/irq.h
--- a/xen/include/xen/irq.h Fri Jul 14 10:23:52 2006 +0100
+++ b/xen/include/xen/irq.h Fri Jul 14 10:31:36 2006 +0100
@@ -22,6 +22,7 @@ struct irqaction
#define IRQ_PENDING 4 /* IRQ pending - replay on enable */
#define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
#define IRQ_GUEST 16 /* IRQ is handled by guest OS(es) */
+#define IRQ_LEVEL 64 /* IRQ level triggered */
#define IRQ_PER_CPU 256 /* IRQ is per CPU */
/*
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