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Re: [Xen-ia64-devel][PATCH] vcpu_get_psr fix

To: "Xu, Anthony" <anthony.xu@xxxxxxxxx>
Subject: Re: [Xen-ia64-devel][PATCH] vcpu_get_psr fix
From: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Date: Fri, 22 Dec 2006 12:36:27 +0900
Cc: xen-ia64-devel <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
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Thank you for the elaboration. Now I see the issues.

On Fri, Dec 22, 2006 at 10:13:33AM +0800, Xu, Anthony wrote:
> Isaku Yamahata write on 2006年12月21日 17:41:
> > On Thu, Dec 21, 2006 at 01:13:45PM +0800, Xu, Anthony wrote:
> > 
> > Could you elaborate?
> > I don't see why it causes booting trouble and masking vpsr resolves
> > it. 
> 
> Hi Isaku,
> 
> __kernel_syscall_via_epc will call fsys_bubble_down
> 
> Below code is used to form cr.ipsr
> It wants to set ipsr.ri=1,
> 
> If (r29).ri=0 or 1, that's ok
> But if (r29).ri=2, then ipsr.ri=3 issue happens
> 
> 
>       /*
>        * Reading psr.l gives us only bits 0-31, psr.it, and psr.mc.
>        * The rest we have to synthesize.
>        */
> #     define PSR_ONE_BITS             ((3 << IA64_PSR_CPL0_BIT)       \
>                                        | (0x1 << IA64_PSR_RI_BIT)     \
>                                        | IA64_PSR_BN | IA64_PSR_I)
> 
>       movl r8=PSR_ONE_BITS                    // X
>       ;;
>       mov r25=ar.unat                         // M2 (5 cyc) save ar.unat
>       mov r19=b6                              // I0   save b6 (2 cyc)
>       mov r20=r1                              // A    save caller's gp in r20
>       ;;
>       or r29=r8,r29                           // A    construct cr.ipsr value 
> to save
>       mov b6=r18                              // I0   copy syscall 
> entry-point to b6 (7 cyc)
> 
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> 

-- 
yamahata

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