# HG changeset patch
# User yamahata@xxxxxxxxxxxxx
# Node ID b274e3d5f1135fac2253db06358194404e4aac90
# Parent  05dbec9bb846a2e7b79d6ecfffac8ac7aac7d70e
fix vcpu_itr_i() and vcpu_itr_d() and vcpu_flush_tlb_vhpt_range() callers.
- vcpu_itr_i() and vcpu_itr_d() must purge vTLB entry which overlaps the
  new inserted entry.
- some address argument of vcpu_flush_tlb_vhpt_range() was wrong.
PATCHNAME: fix_vcpu_itr

Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>

diff -r 05dbec9bb846 -r b274e3d5f113 xen/arch/ia64/xen/faults.c
--- a/xen/arch/ia64/xen/faults.c	Fri Jul 07 18:31:19 2006 +0900
+++ b/xen/arch/ia64/xen/faults.c	Fri Jul 07 18:32:53 2006 +0900
@@ -208,8 +208,7 @@ void ia64_do_page_fault (unsigned long a
 		    p2m_entry_retry(&entry)) {
 			/* dtlb has been purged in-between.  This dtlb was
 			   matching.  Undo the work.  */
-			vcpu_flush_tlb_vhpt_range(address & ((1 << logps) - 1),
-			                          logps);
+			vcpu_flush_tlb_vhpt_range(address, logps);
 
 			// the stale entry which we inserted above
 			// may remains in tlb cache.
diff -r 05dbec9bb846 -r b274e3d5f113 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c	Fri Jul 07 18:31:19 2006 +0900
+++ b/xen/arch/ia64/xen/vcpu.c	Fri Jul 07 18:32:53 2006 +0900
@@ -1906,10 +1906,16 @@ IA64FAULT vcpu_itr_d(VCPU *vcpu, UINT64 
 	TR_ENTRY *trp;
 
 	if (slot >= NDTRS) return IA64_RSVDREG_FAULT;
+
+	vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb));
+
 	trp = &PSCBX(vcpu,dtrs[slot]);
 //printf("***** itr.d: setting slot %d: ifa=%p\n",slot,ifa);
 	vcpu_set_tr_entry(trp,pte,itir,ifa);
 	vcpu_quick_region_set(PSCBX(vcpu,dtr_regions),ifa);
+
+	vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir), itir_ps(itir));
+
 	return IA64_NO_FAULT;
 }
 
@@ -1919,10 +1925,16 @@ IA64FAULT vcpu_itr_i(VCPU *vcpu, UINT64 
 	TR_ENTRY *trp;
 
 	if (slot >= NITRS) return IA64_RSVDREG_FAULT;
+
+	vcpu_purge_tr_entry(&PSCBX(vcpu,itlb));
+
 	trp = &PSCBX(vcpu,itrs[slot]);
 //printf("***** itr.i: setting slot %d: ifa=%p\n",slot,ifa);
 	vcpu_set_tr_entry(trp,pte,itir,ifa);
 	vcpu_quick_region_set(PSCBX(vcpu,itr_regions),ifa);
+
+	vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir), itir_ps(itir));
+
 	return IA64_NO_FAULT;
 }
 
@@ -1990,7 +2002,7 @@ again:
 	vcpu_itc_no_srlz(vcpu,2,ifa,pteval,pte,logps);
 	if (swap_rr0) set_metaphysical_rr0();
 	if (p2m_entry_retry(&entry)) {
-		vcpu_flush_tlb_vhpt_range(ifa & ((1 << logps) - 1), logps);
+		vcpu_flush_tlb_vhpt_range(ifa, logps);
 		goto again;
 	}
 	return IA64_NO_FAULT;
@@ -2013,7 +2025,7 @@ again:
 	vcpu_itc_no_srlz(vcpu, 1,ifa,pteval,pte,logps);
 	if (swap_rr0) set_metaphysical_rr0();
 	if (p2m_entry_retry(&entry)) {
-		vcpu_flush_tlb_vhpt_range(ifa & ((1 << logps) - 1), logps);
+		vcpu_flush_tlb_vhpt_range(ifa, logps);
 		goto again;
 	}
 	return IA64_NO_FAULT;