# HG changeset patch
# User yamahata@xxxxxxxxxxxxx
# Node ID 0ac7c4c8ae50a26a7240c4e76e897ae67b52aa69
# Parent  48cf3a454d1baf8d10edb310b58ade3f2dae7635
slight (hopeful) optimization of vcpu_itr_d(), vcpu_itr_i()
PATCHNAME: slight_optimization_vcpu_itr_d_vcpu_itr_i

Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>

diff -r 48cf3a454d1b -r 0ac7c4c8ae50 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c	Mon Jul 10 10:57:57 2006 +0900
+++ b/xen/arch/ia64/xen/vcpu.c	Wed Jul 12 11:43:35 2006 +0900
@@ -1914,7 +1914,12 @@ IA64FAULT vcpu_itr_d(VCPU *vcpu, UINT64 
 	vcpu_set_tr_entry(trp,pte,itir,ifa);
 	vcpu_quick_region_set(PSCBX(vcpu,dtr_regions),ifa);
 
-	vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir), itir_ps(itir));
+	if ((1UL << VHPT_SIZE_LOG2) / sizeof(struct vhpt_lf_entry) <
+	    (1UL << itir_ps(itir)) / PAGE_SIZE)
+		vhpt_flush();
+	else
+		vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir),
+					  itir_ps(itir));
 
 	return IA64_NO_FAULT;
 }
@@ -1933,7 +1938,12 @@ IA64FAULT vcpu_itr_i(VCPU *vcpu, UINT64 
 	vcpu_set_tr_entry(trp,pte,itir,ifa);
 	vcpu_quick_region_set(PSCBX(vcpu,itr_regions),ifa);
 
-	vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir), itir_ps(itir));
+	if ((1UL << VHPT_SIZE_LOG2) / sizeof(struct vhpt_lf_entry) <
+	    (1UL << itir_ps(itir)) / PAGE_SIZE)
+		vhpt_flush();
+	else
+		vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir),
+					  itir_ps(itir));
 
 	return IA64_NO_FAULT;
 }