# HG changeset patch
# User gingold@virtu10
# Node ID 0a081a42e2b71fee6dbcde871adf6fa3b6928396
# Parent  32da370b8069c647f17c29377776aebf5065faf5
Create vpsr_pp in privregs instead of using tmp[8].

Signed-off-by: Tristan Gingold <tristan.gingold@xxxxxxxx>

diff -r 32da370b8069 -r 0a081a42e2b7 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c	Wed Jun 14 15:30:38 2006 +0200
+++ b/xen/arch/ia64/xen/vcpu.c	Wed Jun 14 15:43:57 2006 +0200
@@ -272,8 +272,7 @@ IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, 
 	if (imm.pp) {
 		ipsr->pp = 1;
 		psr.pp = 1;	// priv perf ctrs always enabled
-// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
-		PSCB(vcpu,tmp[8]) = 0;	// but fool the domain if it gets psr
+		PSCB(vcpu,vpsr_pp) = 0;	// but fool the domain if it gets psr
 	}
 	if (imm.up) { ipsr->up = 0; psr.up = 0; }
 	if (imm.sp) { ipsr->sp = 0; psr.sp = 0; }
@@ -316,9 +315,9 @@ IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UI
 	if (imm.dfh) ipsr->dfh = 1;
 	if (imm.dfl) ipsr->dfl = 1;
 	if (imm.pp) {
-		ipsr->pp = 1; psr.pp = 1;
-// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
-		PSCB(vcpu,tmp[8]) = 1;
+		ipsr->pp = 1;
+		psr.pp = 1;
+		PSCB(vcpu,vpsr_pp) = 1;
 	}
 	if (imm.sp) { ipsr->sp = 1; psr.sp = 1; }
 	if (imm.i) {
@@ -363,12 +362,11 @@ IA64FAULT vcpu_set_psr_l(VCPU *vcpu, UIN
 	if (newpsr.dfl) ipsr->dfl = 1;
 	if (newpsr.pp) {
 		ipsr->pp = 1; psr.pp = 1;
-// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
-		PSCB(vcpu,tmp[8]) = 1;
+		PSCB(vcpu,vpsr_pp) = 1;
 	}
 	else {
 		ipsr->pp = 1; psr.pp = 1;
-		PSCB(vcpu,tmp[8]) = 0;
+		PSCB(vcpu,vpsr_pp) = 0;
 	}
 	if (newpsr.up) { ipsr->up = 1; psr.up = 1; }
 	if (newpsr.sp) { ipsr->sp = 1; psr.sp = 1; }
@@ -407,8 +405,7 @@ IA64FAULT vcpu_get_psr(VCPU *vcpu, UINT6
 	else newpsr.ic = 0;
 	if (PSCB(vcpu,metaphysical_mode)) newpsr.dt = 0;
 	else newpsr.dt = 1;
-// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
-	if (PSCB(vcpu,tmp[8])) newpsr.pp = 1;
+	if (PSCB(vcpu,vpsr_pp)) newpsr.pp = 1;
 	else newpsr.pp = 0;
 	*pval = *(unsigned long *)&newpsr;
 	return IA64_NO_FAULT;
diff -r 32da370b8069 -r 0a081a42e2b7 xen/include/public/arch-ia64.h
--- a/xen/include/public/arch-ia64.h	Wed Jun 14 15:30:38 2006 +0200
+++ b/xen/include/public/arch-ia64.h	Wed Jun 14 15:43:57 2006 +0200
@@ -286,14 +286,15 @@ struct mapped_regs {
             unsigned long interrupt_mask_addr;
             int pending_interruption;
             int incomplete_regframe; // see SDM vol2 6.8
-            unsigned long reserved5_1[4];
+            unsigned char vpsr_pp;
+            unsigned char reserved5_2[7];
+            unsigned long reserved5_1[3];
             int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
             int banknum; // 0 or 1, which virtual register bank is active
             unsigned long rrs[8]; // region registers
             unsigned long krs[8]; // kernel registers
             unsigned long pkrs[8]; // protection key registers
             unsigned long tmp[8]; // temp registers (e.g. for hyperprivops)
-            // FIXME: tmp[8] temp'ly being used for virtual psr.pp
         };
     };
     unsigned long  reserved6[3456];