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xen-ia64-devel

Re: [Xen-ia64-devel] PATCH: remove remaining asm warnings.

To: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Xen-ia64-devel] PATCH: remove remaining asm warnings.
From: Aron Griffis <aron@xxxxxx>
Date: Wed, 26 Apr 2006 11:01:41 -0400
Delivery-date: Wed, 26 Apr 2006 08:01:57 -0700
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Hi Tristan,

This section originally used tabs but you switched to spaces, so the
indentation is wonky now.  Would it be better to keep the indentation
uniform?

Regards,
Aron

Tristan Gingold wrote:  [Wed Apr 26 2006, 08:26:49AM EDT]
> diff -r eaed13f8c391 -r 620aa705f38a xen/arch/ia64/vmx/vmx_phy_mode.c
> --- a/xen/arch/ia64/vmx/vmx_phy_mode.c        Wed Apr 26 07:26:20 2006
> +++ b/xen/arch/ia64/vmx/vmx_phy_mode.c        Wed Apr 26 07:52:42 2006
> @@ -193,29 +193,38 @@
>               phy_rr.ve = 1;
>  
>               ia64_set_rr((VRN0 << VRN_SHIFT), phy_rr.rrval);
> +        ia64_dv_serialize_data();
>               phy_rr.rrval = vcpu->arch.metaphysical_rr4;
>               //phy_rr.ps = PAGE_SHIFT;
>               phy_rr.ve = 1;
>  
>               ia64_set_rr((VRN4 << VRN_SHIFT), phy_rr.rrval);
> +        ia64_dv_serialize_data();
>       } else {
>               ia64_set_rr((VRN0 << VRN_SHIFT),
>                            vrrtomrr(vcpu, VMX(vcpu, vrr[VRN0])));
> +        ia64_dv_serialize_data();
>               ia64_set_rr((VRN4 << VRN_SHIFT),
>                            vrrtomrr(vcpu, VMX(vcpu, vrr[VRN4])));
> +        ia64_dv_serialize_data();
>       }
>  
>       /* rr567 will be postponed to last point when resuming back to guest */
>       ia64_set_rr((VRN1 << VRN_SHIFT),
>                    vrrtomrr(vcpu, VMX(vcpu, vrr[VRN1])));
> +    ia64_dv_serialize_data();
>       ia64_set_rr((VRN2 << VRN_SHIFT),
>                    vrrtomrr(vcpu, VMX(vcpu, vrr[VRN2])));
> +    ia64_dv_serialize_data();
>       ia64_set_rr((VRN3 << VRN_SHIFT),
>                    vrrtomrr(vcpu, VMX(vcpu, vrr[VRN3])));
> +    ia64_dv_serialize_data();
>       ia64_set_rr((VRN5 << VRN_SHIFT),
>                    vrrtomrr(vcpu, VMX(vcpu, vrr[VRN5])));
> +    ia64_dv_serialize_data();
>       ia64_set_rr((VRN6 << VRN_SHIFT),
>                    vrrtomrr(vcpu, VMX(vcpu, vrr[VRN6])));
> +    ia64_dv_serialize_data();
>       vmx_switch_rr7(vrrtomrr(vcpu,VMX(vcpu, vrr[VRN7])),
>                       (void *)vcpu->domain->shared_info,
>                       (void *)vcpu->arch.privregs,

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