>From: Tristan Gingold
>Sent: 2006?3?30? 16:31
>To: Isaku Yamahata
>Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
>Subject: Re: [Xen-ia64-devel] Re: [PATCH]: ptc.ga for SMP-g
>
>Le Mardi 28 Mars 2006 04:04, Isaku Yamahata a écrit :
>> Hi Tristan.
>>
>>
>> + /* Purge tc entry.
>> + Can we do this directly ? Well, this is just a
>> + single atomic write. */
>> + vcpu_purge_tr_entry(&PSCBX(v,dtlb));
>> + vcpu_purge_tr_entry(&PSCBX(v,itlb));
>>
>> These aren't SMP-safe because dtlb isn't read atomically.
>> From vcpu_translate()
>>
>> #define vcpu_match_tr_entry(_trp,_ifa,_rid) \
>> ((_trp->p && (_trp->rid==_rid) && (_ifa >= _trp->vadr) && \
>> (_ifa < (_trp->vadr + (1L<< _trp->ps)) - 1)))
>>
>> trp = &vcpu->arch.dtlb;
>> if (/* is_data && */ vcpu_match_tr_entry(trp,address,rid)) {
>> <<<<<<<<<<<<If other processor executes
>> vcpu_purge_tr_entry(&PSCBX(v,dtlb)) here,
>> then a disaster will happen >>>>>>>>>>>>>>>>
>Can you elaborate ? Do you have a disaster scenario ?
>vcpu_purge_tr_entry only clears the p bit.
>
>> In fact it's more subtle because of memory ordering.
>I don't think it is the case, because vcpu_purge_tr_entry modify only one bit
>in one word.
There seems no issue, because vcpu_purge_tr_entry() only sets ->p=0.
In some cases, this patch may cause a not-present tlb inserted into machine
TLB, this is harmless, when guest accesses this page, page not present fault
happens, and guest kernel will purge this tlb and insert a new one, there are
a little performance penalty.
Sine you will send IPI to flush vhpt later, why not purge this tlb as well as
flush vhpt.
Thanks,
Anthony
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