In directed-EOI mode, there is no chance to do the migration in
mask_and_ack_level_ioapic_irq(), as the remote IRR bit can't possibly
be clear after issuing the EOI to the LAPIC. Consequently, there's no
point to even try. Instead, migration must be done in
end_level_ioapic_irq(), and it requires masking the interrupt source
prior to issuing the EOI to the IO-APIC.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>

--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1634,11 +1634,14 @@ static void mask_and_ack_level_ioapic_ir
 
     ack_APIC_irq();
     
+    if ( directed_eoi_enabled )
+        return;
+
     if ((irq_desc[irq].status & IRQ_MOVE_PENDING) &&
        !io_apic_level_ack_pending(irq))
-        move_native_irq(irq);
+        move_masked_irq(irq);
 
-    if (!directed_eoi_enabled && !(v & (1 << (i & 0x1f)))) {
+    if ( !(v & (1 << (i & 0x1f))) ) {
         atomic_inc(&irq_mis_count);
         spin_lock(&ioapic_lock);
         __edge_IO_APIC_irq(irq);
@@ -1654,12 +1657,22 @@ static void end_level_ioapic_irq (unsign
 
     if ( !ioapic_ack_new )
     {
-        if ( irq_desc[irq].status & IRQ_DISABLED )
-            return;
-
         if ( directed_eoi_enabled )
+        {
+            if ( !(irq_desc[irq].status & (IRQ_DISABLED|IRQ_MOVE_PENDING)) )
+            {
+                eoi_IO_APIC_irq(irq);
+                return;
+            }
+
+            mask_IO_APIC_irq(irq);
             eoi_IO_APIC_irq(irq);
-        else
+            if ( (irq_desc[irq].status & IRQ_MOVE_PENDING) &&
+                 !io_apic_level_ack_pending(irq) )
+                move_masked_irq(irq);
+        }
+
+        if ( !(irq_desc[irq].status & IRQ_DISABLED) )
             unmask_IO_APIC_irq(irq);
 
         return;