diff -r f766f2142a85 xen/arch/x86/mm.c --- a/xen/arch/x86/mm.c Mon Apr 26 06:52:44 2010 +0100 +++ b/xen/arch/x86/mm.c Mon Apr 26 11:30:27 2010 +0100 @@ -158,7 +158,8 @@ ((d != dom_io) && \ (rangeset_is_empty((d)->iomem_caps) && \ rangeset_is_empty((d)->arch.ioport_caps) && \ - !has_arch_pdevs(d)) ? \ + !has_arch_pdevs(d) && \ + !is_hvm_domain(d)) ? \ L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS)) #ifdef __x86_64__ diff -r f766f2142a85 xen/arch/x86/mm/shadow/multi.c --- a/xen/arch/x86/mm/shadow/multi.c Mon Apr 26 06:52:44 2010 +0100 +++ b/xen/arch/x86/mm/shadow/multi.c Mon Apr 26 11:30:27 2010 +0100 @@ -565,7 +565,6 @@ * caching attributes in the shadows to match what was asked for. */ if ( (level == 1) && is_hvm_domain(d) && - iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target_mfn) + 1) && !is_xen_heap_mfn(mfn_x(target_mfn)) ) { unsigned int type; @@ -581,20 +580,24 @@ sflags |= pat_type_2_pte_flags(type); else if ( d->arch.hvm_domain.is_in_uc_mode ) sflags |= pat_type_2_pte_flags(PAT_TYPE_UNCACHABLE); - else if ( p2mt == p2m_mmio_direct ) - sflags |= get_pat_flags(v, - gflags, - gfn_to_paddr(target_gfn), - ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, - MTRR_TYPE_UNCACHABLE); - else if ( iommu_snoop ) - sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK); - else - sflags |= get_pat_flags(v, - gflags, - gfn_to_paddr(target_gfn), - ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, - NO_HARDCODE_MEM_TYPE); + else + if ( iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target_mfn) + 1) ) + { + if ( p2mt == p2m_mmio_direct ) + sflags |= get_pat_flags(v, + gflags, + gfn_to_paddr(target_gfn), + ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, + MTRR_TYPE_UNCACHABLE); + else if ( iommu_snoop ) + sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK); + else + sflags |= get_pat_flags(v, + gflags, + gfn_to_paddr(target_gfn), + ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, + NO_HARDCODE_MEM_TYPE); + } } // Set the A&D bits for higher level shadows.