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Re: [Xen-devel] [PATCH][v2] Hybrid extension support in Xen

On Tue, 2 Feb 2010, Ian Campbell wrote:
> It looks like you are using evtchn's for all interrupt injection,
> including any emulated or passthrough devices which may be present.
> Using evtchn's for PV devices obviously makes sense but I think this
> needs to coexist with emulated interrupt injection for non-PV devices so
> the IOAPIC/APIC should not be mutually exclusive with using PV evtchns.
> 

Indeed.
Evtchn's for PV devices are more than welcome, but this:

> diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c
> --- a/xen/arch/x86/hvm/irq.c
> +++ b/xen/arch/x86/hvm/irq.c
> @@ -46,8 +46,18 @@ static void __hvm_pci_intx_assert(
>      if ( (hvm_irq->pci_link_assert_count[link]++ == 0) && isa_irq &&
>           (hvm_irq->gsi_assert_count[isa_irq]++ == 0) )
>      {
> -        vioapic_irq_positive_edge(d, isa_irq);
> -        vpic_irq_positive_edge(d, isa_irq);
> +        if ( !is_hybrid_evtchn_enabled_domain(d) )
> +        {
> +            vioapic_irq_positive_edge(d, isa_irq);
> +            vpic_irq_positive_edge(d, isa_irq);
> +        }
> +        else
> +        {
> +            /* TODO fix the critical region here */
> +            spin_unlock(&d->arch.hvm_domain.irq_lock);
> +            send_guest_global_virq(d, VIRQ_EMUL_PIN(isa_irq));
> +            spin_lock(&d->arch.hvm_domain.irq_lock);
> +     }
>      }
>  }
>  

and this:

> @@ -101,11 +114,21 @@ void hvm_isa_irq_assert(
>      if ( !__test_and_set_bit(isa_irq, &hvm_irq->isa_irq.i) &&
>           (hvm_irq->gsi_assert_count[gsi]++ == 0) )
>      {
> -        vioapic_irq_positive_edge(d, gsi);
> -        vpic_irq_positive_edge(d, isa_irq);
> +        if ( !is_hybrid_evtchn_enabled_domain(d) )
> +        {
> +            vioapic_irq_positive_edge(d, gsi);
> +            vpic_irq_positive_edge(d, isa_irq);
> +        }
> +        else
> +        {
> +            send_virq = 1;
> +        }
>      }
>  

and this:

> @@ -120,7 +143,10 @@ void hvm_isa_irq_deassert(
>  
>      if ( __test_and_clear_bit(isa_irq, &hvm_irq->isa_irq.i) &&
>           (--hvm_irq->gsi_assert_count[gsi] == 0) )
> -        vpic_irq_negative_edge(d, isa_irq);
> +    {
> +        if ( !is_hybrid_evtchn_enabled_domain(d) )
> +            vpic_irq_negative_edge(d, isa_irq);
> +    }
>  
>      spin_unlock(&d->arch.hvm_domain.irq_lock);
>  }
> 

I think they are a very bad idea and a maintenance pain, especially when
you think about pci passthrought.


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