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Re: [Xen-devel] [PATCH] ioemu: passthough: add no_wb option for pci conf

To: Qing He <qing.he@xxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] ioemu: passthough: add no_wb option for pci conf write
From: Ian Jackson <Ian.Jackson@xxxxxxxxxxxxx>
Date: Fri, 6 Nov 2009 18:16:59 +0000
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Qing He writes ("[Xen-devel] [PATCH] ioemu: passthough: add no_wb option for 
pci conf write"):
> Current pt_pci_write_config always writes back to real pci conf
> space. However, in the case of MSI address and data registers,
> if guest changes the affinity of the interrupt, stale data will
> be written to these registers. This is particularly a problem
> if Xen uses per-CPU vector, where the interrupt in question fails
> to work. This patch fixes this by adding an option to disable the
> write back of certain controls.

Thanks for this patch, which I have applied.

But I do have a question about it.  I hope you'll forgive my ignorance
about MSIs (I haven't read the reference manuals).

I don't think I fully understand the problem this is trying to fix.

There are two ways of updating the MSI address and data registers ?
Are they available via the space directly mapped into the guest as
well as via config space then ?

One of them is pt_pci_write_config (called when the guest writes to
PCI config space) and the other is used by the guest when it changes
affinity ?  Under what circumstances does pt_pci_write_config get used
for these registers ?

Thanks,
Ian.

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