WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-devel

Re: [Xen-devel] xen pv and cpuid

To: "Dan Magenheimer" <dan.magenheimer@xxxxxxxxxx>
Subject: Re: [Xen-devel] xen pv and cpuid
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Tue, 27 Oct 2009 09:37:22 +0000
Cc: "Xen-Devel \(E-mail\)" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Delivery-date: Tue, 27 Oct 2009 02:37:47 -0700
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
In-reply-to: <53cc3e0c-6b3a-44fd-a4f4-c336296daaac@default>
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
References: <53cc3e0c-6b3a-44fd-a4f4-c336296daaac@default>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
There's one other mechanism in use here - masking CPUID feature bits
through special vendor MSRs. See the handling of the command line
options cpuid_mask_{edx,ecx} in xen/arch/x86/cpu/. But this is a global
mask (i.e. also affecting what Xen itself sees), and isn't available on all
CPU models...

Jan

>>> Dan Magenheimer <dan.magenheimer@xxxxxxxxxx> 26.10.09 18:44 >>>
Silly x86 question of the day:

Is it true in a PV domain that there is no way (short of binary translation) to 
trap a userland cpuid instruction into Xen?

I found the routine pv_cpuid() in arch/x86/traps.c and assumed that userland 
cpuid's would find their way into that code, but it appears to not be the case. 
 After adding some printks and reading the code more closely, I gather that PV 
OS's somehow get their cpuid instructions replaced with an invalid op so that 
kernel-land cpuid's do indeed get trapped? Then looking at the Intel SDM I 
don't see any way to force cpuid at any privilege level to trap (except in an 
HVM)?

(If this is all correct, then I am sadly back to needing userland hypercalls :-(

Thanks,
Dan


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel

<Prev in Thread] Current Thread [Next in Thread>