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RE: [Xen-devel] IRQ SMP affinity problems in domU with vcpus > 4 on HP P

To: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>, "He, Qing" <qing.he@xxxxxxxxx>, "Cinco, Dante" <Dante.Cinco@xxxxxxx>
Subject: RE: [Xen-devel] IRQ SMP affinity problems in domU with vcpus > 4 on HP ProLiant G6 with dual Xeon 5540 (Nehalem)
From: "Zhang, Xiantao" <xiantao.zhang@xxxxxxxxx>
Date: Fri, 16 Oct 2009 15:32:04 +0800
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Thread-topic: [Xen-devel] IRQ SMP affinity problems in domU with vcpus > 4 on HP ProLiant G6 with dual Xeon 5540 (Nehalem)
Keir Fraser wrote:
> On 16/10/2009 03:34, "Qing He" <qing.he@xxxxxxxxx> wrote:
> 
>>> (XEN) Guest interrupt information: (IRQ affinity changed from 1 to
>>> 2, while vector changed from 60 to 92) (XEN)    IRQ:  74, IRQ
>>> affinity:0x00000002, Vec: 92 type= PCI-MSI status=00000010
>>> in-flight=1 domain-list=1: 79(---M), 
>> 
>> `(---M)' means masked, that may be why the irq is not received.
> 
> Glad you managed to pick that out of the information overload. :-) It
> does look like the next obvious lead to chase down.

According to the description, the issue should be caused by lost EOI write for 
the MSI interrupt and leads to permanent interrupt mask.   There should be a 
race between guest setting new vector and  EOIs old vector for the interrupt.  
Once guest sets new vector before it EOIs the old vector, hypervisor can't find 
the pirq which corresponds old vector(has changed to new vector) , so also 
can't EOI the old vector forever in hardware level. Since the corresponding 
vector in real processor can't be EOIed, so system may lose all interrupts and 
result the reported issues ultimately.  But I remembered there should be a 
timer to handle this case through a forcible EOI write to the real processor 
after timeout, but seems it doesn't function in the expected way. 
Xiantao 


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