Include endian.h for MiniOS.
Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
---
diff -r ba34f84fbe3a stubdom/pciutils.patch
--- a/stubdom/pciutils.patch Wed Jul 22 16:26:11 2009 +0100
+++ b/stubdom/pciutils.patch Wed Jul 22 16:27:17 2009 +0100
@@ -1,7 +1,7 @@
-diff -urN pciutils-2.2.9.orig/lib/access.c pciutils-2.2.9/lib/access.c
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/access.c
pciutils-2.2.9/lib/access.c
--- pciutils-2.2.9.orig/lib/access.c 2007-02-06 11:59:43.000000000 +0000
-+++ pciutils-2.2.9/lib/access.c 2008-06-30 19:07:09.713187000 +0100
-@@ -57,6 +57,11 @@
++++ pciutils-2.2.9/lib/access.c 2009-07-22 16:26:22.000000000 +0100
+@@ -57,6 +57,11 @@ static struct pci_methods *pci_methods[P
#else
NULL,
#endif
@@ -13,35 +13,129 @@
};
struct pci_access *
---- pciutils-2.2.9.orig/lib/pci.h 2006-09-09 13:46:06.000000000 +0100
-+++ pciutils-2.2.9/lib/pci.h 2008-06-30 18:56:15.350111000 +0100
-@@ -33,6 +33,7 @@
- PCI_ACCESS_NBSD_LIBPCI, /* NetBSD libpci */
- PCI_ACCESS_OBSD_DEVICE, /* OpenBSD /dev/pci */
- PCI_ACCESS_DUMP, /* Dump file (params: filename) */
-+ PCI_ACCESS_MINIOS, /* MiniOS */
- PCI_ACCESS_MAX
- };
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/generic.c
pciutils-2.2.9/lib/generic.c
+--- pciutils-2.2.9.orig/lib/generic.c 2007-02-06 12:00:05.000000000 +0000
++++ pciutils-2.2.9/lib/generic.c 2009-07-22 16:26:22.000000000 +0100
+@@ -74,6 +74,19 @@ pci_generic_scan(struct pci_access *a)
+ pci_generic_scan_bus(a, busmap, 0);
+ }
-@@ -63,6 +64,7 @@
- int fd_rw; /* proc: fd opened read-write */
- struct pci_dev *cached_dev; /* proc: device the fd is for */
- int fd_pos; /* proc: current position */
-+ void *minios;
- };
++static u32 pci_size(u32 base, u32 maxbase, u32 mask)
++{
++ u32 size = mask & maxbase;
++ if (!size)
++ return 0;
++ size = (size & ~(size-1)) - 1;
++
++ if (base == maxbase && ((base | size) & mask) != mask)
++ return 0;
++
++ return size + 1;
++}
++
+ int
+ pci_generic_fill_info(struct pci_dev *d, int flags)
+ {
+@@ -114,23 +127,61 @@ pci_generic_fill_info(struct pci_dev *d,
+ if (!x || x == (u32) ~0)
+ continue;
+ if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
+- d->base_addr[i] = x;
++ {
++ d->base_addr[i] = x & PCI_BASE_ADDRESS_IO_MASK;
++ if (flags & PCI_FILL_SIZES)
++ {
++ u32 size;
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, ~0);
++ d->size[i] = pci_size(x, pci_read_long(d,
PCI_BASE_ADDRESS_0 + i*4), PCI_BASE_ADDRESS_IO_MASK);
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, x);
++ }
++ }
+ else
+ {
+ if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) !=
PCI_BASE_ADDRESS_MEM_TYPE_64)
+- d->base_addr[i] = x;
++ {
++ d->base_addr[i] = x & PCI_BASE_ADDRESS_MEM_MASK;
++ if (flags & PCI_FILL_SIZES)
++ {
++ u32 size;
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, ~0);
++ d->size[i] = pci_read_long(d, PCI_BASE_ADDRESS_0 +
i*4);
++ d->size[i] = pci_size(x, pci_read_long(d,
PCI_BASE_ADDRESS_0 + i*4), PCI_BASE_ADDRESS_MEM_MASK);
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, x);
++ }
++ }
+ else if (i >= cnt-1)
+ a->warning("%04x:%02x:%02x.%d: Invalid 64-bit address seen
for BAR %d.", d->domain, d->bus, d->dev, d->func, i);
+ else
+ {
+ u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
+ #ifdef PCI_HAVE_64BIT_ADDRESS
+- d->base_addr[i-1] = x | (((pciaddr_t) y) << 32);
++ d->base_addr[i-1] = (x | (((pciaddr_t) y) << 32)) &
PCI_BASE_ADDRESS_MEM_MASK;
++ if (flags & PCI_FILL_SIZES)
++ {
++ u32 size;
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4, ~0);
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, ~0);
++ d->size[i-1] = pci_size(y, pci_read_long(d,
PCI_BASE_ADDRESS_0 + (i-1)*4) |
++ pci_read_long(d, PCI_BASE_ADDRESS_0
+ i*4), 0xffffffff );
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4, x);
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, y);
++ }
+ #else
+ if (y)
+ a->warning("%04x:%02x:%02x.%d 64-bit device address
ignored.", d->domain, d->bus, d->dev, d->func);
+ else
+- d->base_addr[i-1] = x;
++ {
++ d->base_addr[i-1] = x & PCI_BASE_ADDRESS_MEM_MASK;
++ if (flags & PCI_FILL_SIZES)
++ {
++ u32 size;
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4,
~0);
++ d->size[i-1] = pci_size(x, pci_read_long(d,
PCI_BASE_ADDRESS_0 + (i-1)*4), PCI_BASE_ADDRESS_MEM_MASK);
++ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4,
x);
++ }
++ }
+ #endif
+ }
+ }
+@@ -154,10 +205,19 @@ pci_generic_fill_info(struct pci_dev *d,
+ {
+ u32 u = pci_read_long(d, reg);
+ if (u != 0xffffffff)
++ {
+ d->rom_base_addr = u;
++ if (flags & PCI_FILL_SIZES)
++ {
++ u32 size;
++ pci_write_long(d, reg, ~0);
++ d->rom_size = pci_read_long(d, reg);
++ pci_write_long(d, reg, u);
++ }
++ }
+ }
+ }
+- return flags & ~PCI_FILL_SIZES;
++ return flags;
+ }
- /* Initialize PCI access */
+ static int
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/internal.h
pciutils-2.2.9/lib/internal.h
--- pciutils-2.2.9.orig/lib/internal.h 2006-09-09 11:52:47.000000000 +0100
-+++ pciutils-2.2.9/lib/internal.h 2008-07-01 10:46:24.968202000 +0100
-@@ -37,4 +37,4 @@
++++ pciutils-2.2.9/lib/internal.h 2009-07-22 16:26:22.000000000 +0100
+@@ -37,4 +37,4 @@ int pci_link_dev(struct pci_access *, st
extern struct pci_methods pm_intel_conf1, pm_intel_conf2, pm_linux_proc,
pm_fbsd_device, pm_aix_device, pm_nbsd_libpci, pm_obsd_device,
- pm_dump, pm_linux_sysfs;
+ pm_dump, pm_linux_sysfs, pm_minios;
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/Makefile
pciutils-2.2.9/lib/Makefile
--- pciutils-2.2.9.orig/lib/Makefile 2007-10-19 13:41:34.000000000 +0100
-+++ pciutils-2.2.9/lib/Makefile 2008-07-01 12:13:14.400525000 +0100
-@@ -46,6 +46,12 @@
++++ pciutils-2.2.9/lib/Makefile 2009-07-22 16:26:22.000000000 +0100
+@@ -46,6 +46,12 @@ OBJS += nbsd-libpci.o
PCILIB=libpciutils.a
endif
@@ -54,24 +148,9 @@
all: $(PCILIB) $(PCILIBPC)
$(PCILIB): $(OBJS)
---- pciutils-2.2.9.orig/lib/types.h 2009-07-14 18:18:59.000000000 +0200
-+++ pciutils-2.2.9/lib/types.h 2009-07-14 18:19:16.000000000 +0200
-@@ -20,10 +20,12 @@ typedef DWORD u32;
- typedef uint8_t u8;
- typedef uint16_t u16;
- typedef uint32_t u32;
-+typedef uint64_t u64;
- #else
- typedef u_int8_t u8;
- typedef u_int16_t u16;
- typedef u_int32_t u32;
-+typedef u_int64_t u64;
- #endif
-
- #ifdef PCI_HAVE_64BIT_ADDRESS
-
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/minios.c
pciutils-2.2.9/lib/minios.c
--- pciutils-2.2.9.orig/lib/minios.c 1970-01-01 01:00:00.000000000 +0100
-+++ pciutils-2.2.9/lib/minios.c 2008-07-01 12:31:40.554260000 +0100
++++ pciutils-2.2.9/lib/minios.c 2009-07-22 16:26:22.000000000 +0100
@@ -0,0 +1,113 @@
+/*
+ * The PCI Library -- MiniOS PCI frontend access
@@ -186,114 +265,52 @@
+ NULL, /* dev_init */
+ NULL /* dev_cleanup */
+};
---- pciutils-2.2.9/lib/generic.c 2007-02-06 12:00:05.000000000 +0000
-+++ pciutils-2.2.9-mine/lib/generic.c 2008-07-01 19:13:52.289949000 +0100
-@@ -74,6 +74,19 @@
- pci_generic_scan_bus(a, busmap, 0);
- }
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/pci.h pciutils-2.2.9/lib/pci.h
+--- pciutils-2.2.9.orig/lib/pci.h 2006-09-09 13:46:06.000000000 +0100
++++ pciutils-2.2.9/lib/pci.h 2009-07-22 16:26:22.000000000 +0100
+@@ -33,6 +33,7 @@ enum pci_access_type {
+ PCI_ACCESS_NBSD_LIBPCI, /* NetBSD libpci */
+ PCI_ACCESS_OBSD_DEVICE, /* OpenBSD /dev/pci */
+ PCI_ACCESS_DUMP, /* Dump file (params: filename) */
++ PCI_ACCESS_MINIOS, /* MiniOS */
+ PCI_ACCESS_MAX
+ };
-+static u32 pci_size(u32 base, u32 maxbase, u32 mask)
-+{
-+ u32 size = mask & maxbase;
-+ if (!size)
-+ return 0;
-+ size = (size & ~(size-1)) - 1;
+@@ -63,6 +64,7 @@ struct pci_access {
+ int fd_rw; /* proc: fd opened read-write */
+ struct pci_dev *cached_dev; /* proc: device the fd is for */
+ int fd_pos; /* proc: current position */
++ void *minios;
+ };
+
+ /* Initialize PCI access */
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/sysdep.h
pciutils-2.2.9/lib/sysdep.h
+--- pciutils-2.2.9.orig/lib/sysdep.h 2007-02-06 12:00:18.000000000 +0000
++++ pciutils-2.2.9/lib/sysdep.h 2009-07-22 16:26:30.000000000 +0100
+@@ -32,6 +32,10 @@ typedef u16 word;
+
+ #else
+
++#ifdef PCI_OS_MINIOS
++#include <machine/endian.h>
++#endif
+
-+ if (base == maxbase && ((base | size) & mask) != mask)
-+ return 0;
-+
-+ return size + 1;
-+}
-+
- int
- pci_generic_fill_info(struct pci_dev *d, int flags)
- {
-@@ -114,23 +127,61 @@
- if (!x || x == (u32) ~0)
- continue;
- if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
-- d->base_addr[i] = x;
-- else
-+ {
-+ d->base_addr[i] = x & PCI_BASE_ADDRESS_IO_MASK;
-+ if (flags & PCI_FILL_SIZES)
-+ {
-+ u32 size;
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, ~0);
-+ d->size[i] = pci_size(x, pci_read_long(d,
PCI_BASE_ADDRESS_0 + i*4), PCI_BASE_ADDRESS_IO_MASK);
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, x);
-+ }
-+ }
-+ else
- {
- if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) !=
PCI_BASE_ADDRESS_MEM_TYPE_64)
-- d->base_addr[i] = x;
-+ {
-+ d->base_addr[i] = x & PCI_BASE_ADDRESS_MEM_MASK;
-+ if (flags & PCI_FILL_SIZES)
-+ {
-+ u32 size;
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, ~0);
-+ d->size[i] = pci_read_long(d, PCI_BASE_ADDRESS_0 +
i*4);
-+ d->size[i] = pci_size(x, pci_read_long(d,
PCI_BASE_ADDRESS_0 + i*4), PCI_BASE_ADDRESS_MEM_MASK);
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, x);
-+ }
-+ }
- else if (i >= cnt-1)
- a->warning("%04x:%02x:%02x.%d: Invalid 64-bit address seen
for BAR %d.", d->domain, d->bus, d->dev, d->func, i);
- else
- {
- u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
+ #ifdef PCI_OS_LINUX
+ #include <endian.h>
+ #define BYTE_ORDER __BYTE_ORDER
+diff -uNpbE -uNpbEr pciutils-2.2.9.orig/lib/types.h pciutils-2.2.9/lib/types.h
+--- pciutils-2.2.9.orig/lib/types.h 2007-09-03 09:44:15.000000000 +0100
++++ pciutils-2.2.9/lib/types.h 2009-07-22 16:26:22.000000000 +0100
+@@ -20,10 +20,12 @@ typedef DWORD u32;
+ typedef uint8_t u8;
+ typedef uint16_t u16;
+ typedef uint32_t u32;
++typedef uint64_t u64;
+ #else
+ typedef u_int8_t u8;
+ typedef u_int16_t u16;
+ typedef u_int32_t u32;
++typedef u_int64_t u64;
+ #endif
+
#ifdef PCI_HAVE_64BIT_ADDRESS
-- d->base_addr[i-1] = x | (((pciaddr_t) y) << 32);
-+ d->base_addr[i-1] = (x | (((pciaddr_t) y) << 32)) &
PCI_BASE_ADDRESS_MEM_MASK;
-+ if (flags & PCI_FILL_SIZES)
-+ {
-+ u32 size;
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4, ~0);
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, ~0);
-+ d->size[i-1] = pci_size(y, pci_read_long(d,
PCI_BASE_ADDRESS_0 + (i-1)*4) |
-+ pci_read_long(d, PCI_BASE_ADDRESS_0
+ i*4), 0xffffffff );
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4, x);
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + i*4, y);
-+ }
- #else
- if (y)
- a->warning("%04x:%02x:%02x.%d 64-bit device address
ignored.", d->domain, d->bus, d->dev, d->func);
- else
-- d->base_addr[i-1] = x;
-+ {
-+ d->base_addr[i-1] = x & PCI_BASE_ADDRESS_MEM_MASK;
-+ if (flags & PCI_FILL_SIZES)
-+ {
-+ u32 size;
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4,
~0);
-+ d->size[i-1] = pci_size(x, pci_read_long(d,
PCI_BASE_ADDRESS_0 + (i-1)*4), PCI_BASE_ADDRESS_MEM_MASK);
-+ pci_write_long(d, PCI_BASE_ADDRESS_0 + (i-1)*4,
x);
-+ }
-+ }
- #endif
- }
- }
-@@ -154,10 +205,19 @@
- {
- u32 u = pci_read_long(d, reg);
- if (u != 0xffffffff)
-- d->rom_base_addr = u;
-+ {
-+ d->rom_base_addr = u;
-+ if (flags & PCI_FILL_SIZES)
-+ {
-+ u32 size;
-+ pci_write_long(d, reg, ~0);
-+ d->rom_size = pci_read_long(d, reg);
-+ pci_write_long(d, reg, u);
-+ }
-+ }
- }
- }
-- return flags & ~PCI_FILL_SIZES;
-+ return flags;
- }
-
- static int
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