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Re: [Xen-devel] [PATCH 0/6] MSI-INTx interrupt translation for HVM

To: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH 0/6] MSI-INTx interrupt translation for HVM
From: Shohei Fujiwara <fujiwara-sxa@xxxxxxxxxxxxxxx>
Date: Mon, 02 Mar 2009 19:27:38 +0900
Cc: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, Qing He <qing.he@xxxxxxxxx>
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On Mon, 02 Mar 2009 09:40:40 +0000
Keir Fraser <keir.fraser@xxxxxxxxxxxxx> wrote:

> On 02/03/2009 09:24, "Qing He" <qing.he@xxxxxxxxx> wrote:
> 
> >> Ah, well the passthrough-specific logic is not something I'm so familiar
> >> with! That above code indeed doesn't look correct. :-)
> > 
> > I recently learned that some device may keep issuing MSI until it is
> > explicitly
> > cleared by software. In that case it just behaves like level-triggered
> > interrupt, and doing something like the code above will cause interrupt 
> > storm.
> > This is reflected in cs. 19065.
> > 
> > Do you mean this issue?
> 
> That would be the expected result of early EOI, yes. But Shohei was walking
> about losing interrupts. I don't know how we would do that.

Currently I don't think early EOI is needed, because IRR in local APIC
keeps interrupts. I don't think losing interrupts will occur.

Thanks,
--
Shohei Fujiwara

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