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Re: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid bi

To: "Wei, Gang" <gang.wei@xxxxxxxxx>, "Tian, Kevin" <kevin.tian@xxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus
From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date: Sat, 13 Dec 2008 15:41:53 +0000
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On 13/12/2008 15:27, "Wei, Gang" <gang.wei@xxxxxxxxx> wrote:

> On Saturday, December 13, 2008 5:51 PM, Keir Fraser wrote:
>> By the way, c/s 18102 (subsequently reverted) may be interesting for you in
>> implementing the TSC-and-no-platform-timer mode. I'm not sure how much of it
>> will really be applicable, but it might be worth a look at least.
> 
> c/s 18102 looks like a incompleted patch which want to reintroduce TSC as the
> plt only when the tsc is always running & at a constant rate. I guess you
> still want it because TSC access has less cost, right? Anyway, it indeed has
> less to do with my current goal: handling the deepC-stop tsc which runs at
> constant rate.

You don;t need to take anything from that c/s if it's not useful.

 -- Keir



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