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Re: [Xen-devel] NMI delivery not correctly working
| To: | Kaushik Barde <Kaushik_Barde@xxxxxxxxxxx>, Christoph Egger <Christoph.Egger@xxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [Xen-devel] NMI delivery not correctly working |
| From: | Keir Fraser <keir@xxxxxxxxxxxxx> |
| Date: | Wed, 25 Jul 2007 07:55:11 +0100 |
| Delivery-date: | Tue, 24 Jul 2007 23:49:21 -0700 |
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| Thread-topic: | [Xen-devel] NMI delivery not correctly working |
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On 25/7/07 07:43, "Kaushik Barde" <Kaushik_Barde@xxxxxxxxxxx> wrote: > Thanks. > >>> > via masking of maskable interrupts > << > What I'd meant there was all other interrupts are masked (by processor during > NMI handling) except for NMI. NMIs *are* masked by x86 CPU from when an NMI is delivered to the CPU until after that CPU next executes an IRET. The CPU has a special NMI mask for this purpose (not directly architecturally visible). It's unrelated to EFLAGS.IF. -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel |
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