On Sat, 26 Aug 2006, George Dunlap wrote:
Hey Travis -- two questions:
* This is a safe operation? All debug registers from the guest are
turned off before entering the hypervisor?
I don't quite follow although there probably is something that's not
qutie right. Which part are you referring to? After the initial DR
And as a side note, in SVM, the enable bits in DR7 are cleared on a
* Is there a reason you don't save & restore DR6?
In SVM, DR6 is saved along with DR7 in the VMCB on #VMEXITs.
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