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xen-devel
Re: [Xen-devel] how can native driver response quickly for low FIFO devi
On 25 May 2006, at 14:08, Dong, Eddie wrote:
O, sorry for the confuse message. Here I mean the issue in native
device
(e.x. dom0 UART), not HVM virtual UART.
When hardware UART device receives a byte, it will send pirq to dom0,
although dom0 is not blocking but it may not get scheduled in at
instance. Say it needs to wait for another domain (domU or domVMX) to
run out of time slice, say 10ms in default scheduler. Within this 10ms,
the hardware UART may receive another tens of bytes before dom0 UART
device driver can really read the data and copy to driver buffer. So in
this case the hardware UART device will become "receiving data
overwritten", which means receiving data lose for us :-(
Is there anybody ever tried to use ttyS0 succesfully when multiple
domain is running on same LP?
There's a 128-byte receive buffer. Bytes are greedily taken from the
UART FIFO in interrupt context and written to the software receive
buffer. If overflow were a problem we could obviously quite easily make
that receive buffer substantially larger.
-- Keir
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