> + /* get vendor info */
> + xorl %eax,%eax # call CPUID with 0 -> return vendor ID
> + cpuid
> + movl %eax,X86_CPUID # save CPUID level
> + movl %ebx,X86_VENDOR_ID # lo 4 chars
> + movl %edx,X86_VENDOR_ID+4 # next 4 chars
> + movl %ecx,X86_VENDOR_ID+8 # last 4 chars
> +
> + movl $1,%eax # Use the CPUID instruction to get CPU type
> + cpuid
> + movb %al,%cl # save reg for future use
> + andb $0x0f,%ah # mask processor family
> + movb %ah,X86
> + andb $0xf0,%al # mask model
> + shrb $4,%al
> + movb %al,X86_MODEL
> + andb $0x0f,%cl # mask mask revision
> + movb %cl,X86_MASK
> + movl %edx,X86_CAPABILITY
Can you make the CPU detection a common subfunction with the normal head.S ?
> +/*
> + * BSS section
> + */
> +.section ".bss.page_aligned","w"
> +ENTRY(swapper_pg_dir)
> + .fill 1024,4,0
> +ENTRY(empty_zero_page)
> + .fill 4096,1,0
> +
> +/*
> + * This starts the data section.
> + */
> +.data
> +
> + ALIGN
> + .word 0 # 32 bit align gdt_desc.address
> + .globl cpu_gdt_descr
> +cpu_gdt_descr:
> + .word GDT_SIZE
> + .long cpu_gdt_table
> +
> + .fill NR_CPUS-1,8,0 # space for the other GDT descriptors
> +
> +/*
> + * The Global Descriptor Table contains 28 quadwords, per-CPU.
> + */
> + .align PAGE_SIZE_asm
> +ENTRY(cpu_gdt_table)
GDT and empty_zero_page should be shared (they're identical right?) Put them
into a
new separate common file.
> + * __xen_guest information
> + */
> +.macro utoa value
> + .if (\value) < 0 || (\value) >= 0x10
> + utoa (((\value)>>4)&0x0fffffff)
> + .endif
> + .if ((\value) & 0xf) < 10
> + .byte '0' + ((\value) & 0xf)
> + .else
> + .byte 'A' + ((\value) & 0xf) - 10
> + .endif
> +.endm
Interesting macro abuse.
-Andi
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