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Re: [Xen-devel] Essay on an important Xen decision (long)

To: Mark Williamson <mark.williamson@xxxxxxxxxxxx>
Subject: Re: [Xen-devel] Essay on an important Xen decision (long)
From: Anthony Liguori <aliguori@xxxxxxxxxx>
Date: Wed, 11 Jan 2006 10:41:05 -0600
Cc: "Magenheimer, Dan \(HP Labs Fort Collins\)" <dan.magenheimer@xxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxx
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Mark Williamson wrote:

I imagine that you would have to always have shadow paging enable but
you could still do bulk updates ala writable page tables so the
performance cost should be minimal I would think.

Trying to understand the memory system in more details so any additional
info is much appreciate :-)

I don't see why that couldn't perform decently, although it'd have more overhead than allowing the guest to manage its pagetables directly... I *thought* this was intended to be supported at some point, but I'm not sure if it's been needed yet. Others may have more concrete numbers for the performance - I think writable PTs got benchmarked against shadowing at some point.
Just to be thorough, was the shadow paging code a "pure" shadow page table where ever PTE write trapped to the hypervisor or were bulk PMD updates sent to the hypervisor?

I'm surprised there would be a measurable difference with shadow paging as it should only require a potential allocation (which could be fast pathed) and in the normal case, a couple extra reads/writes. I would think that cost would be overshadowed by the original cost of the context switch.

Of course, I guess it wouldn't be that much of a shock to me that the overhead is at least measurable...


Anthony Liguori



Anthony Liguori

If ia64 does decide to back off from the P==M route then I suspect VP
is the way to go (which is I think how ia64 domU's currently work

-- Keir
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