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[Xen-changelog] [xen-4.0-testing] x86/tsc: Remove incorrect assertion fr

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Subject: [Xen-changelog] [xen-4.0-testing] x86/tsc: Remove incorrect assertion from cstate_restore_tsc()...
From: Xen patchbot-4.0-testing <patchbot@xxxxxxx>
Date: Tue, 17 May 2011 15:45:09 +0100
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# HG changeset patch
# User Keir Fraser <keir@xxxxxxx>
# Date 1305549651 -3600
# Node ID 0e31cda80a7b50ff752719bea1f6578d6bf16a10
# Parent  44eb0ea74022aec84f2639592e39491d7f259439
x86/tsc: Remove incorrect assertion from cstate_restore_tsc()...

..fix and move to write_tsc().

Signed-off-by: Keir Fraser <keir@xxxxxxx>
xen-unstable changeset:   23342:16d12acccacf
xen-unstable date:        Mon May 16 13:24:05 2011 +0100
---


diff -r 44eb0ea74022 -r 0e31cda80a7b xen/arch/x86/time.c
--- a/xen/arch/x86/time.c       Mon May 16 13:39:51 2011 +0100
+++ b/xen/arch/x86/time.c       Mon May 16 13:40:51 2011 +0100
@@ -724,8 +724,6 @@
 
     new_tsc = t->local_tsc_stamp + scale_delta(stime_delta, &sys_to_tsc);
 
-    ASSERT(boot_cpu_has(X86_FEATURE_TSC_RELIABLE));
-
     write_tsc(new_tsc);
 }
 
diff -r 44eb0ea74022 -r 0e31cda80a7b xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h Mon May 16 13:39:51 2011 +0100
+++ b/xen/include/asm-x86/msr.h Mon May 16 13:40:51 2011 +0100
@@ -82,7 +82,13 @@
 } while(0)
 #endif
 
-#define write_tsc(val) wrmsrl(MSR_IA32_TSC, val)
+#define __write_tsc(val) wrmsrl(MSR_IA32_TSC, val)
+#define write_tsc(val) ({                                       \
+    /* Reliable TSCs are in lockstep across all CPUs. We should \
+     * never write to them. */                                  \
+    ASSERT(!boot_cpu_has(X86_FEATURE_TSC_RELIABLE));            \
+    __write_tsc(val);                                           \
+})
 
 #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
 

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