# HG changeset patch
# User Keir Fraser <keir@xxxxxxx>
# Date 1294220923 0
# Node ID 76d897a06b316bf2278220b006d578faf31ce3fb
# Parent fece73d4d30985ce40ef87dcd379ce6beb8aadf3
x86 amd: Revert 6382:b74c15e4dd4f (AMD flush filter configuration)
Flush filter is not reliably supported by any processor, we already
have code to unconditionally disable the filter, so we don't need the
command-line config option. Remove it.
Signed-off-by: Keir Fraser <keir@xxxxxxx>
---
xen/arch/x86/cpu/amd.c | 34 ----------------------------------
1 files changed, 34 deletions(-)
diff -r fece73d4d309 -r 76d897a06b31 xen/arch/x86/cpu/amd.c
--- a/xen/arch/x86/cpu/amd.c Wed Jan 05 09:41:28 2011 +0000
+++ b/xen/arch/x86/cpu/amd.c Wed Jan 05 09:48:43 2011 +0000
@@ -230,25 +230,6 @@ int cpu_has_amd_erratum(const struct cpu
return 0;
}
-/*
- * amd_flush_filter={on,off}. Forcibly Enable or disable the TLB flush
- * filter on AMD 64-bit processors.
- */
-static s8 __devinit flush_filter_force;
-static void __init flush_filter(char *s)
-{
- switch (parse_bool(s))
- {
- case 0:
- flush_filter_force = -1;
- break;
- case 1:
- flush_filter_force = 1;
- break;
- }
-}
-custom_param("amd_flush_filter", flush_filter);
-
#define num_physpages 0
/*
@@ -541,21 +522,6 @@ static void __devinit init_amd(struct cp
case 6:
set_bit(X86_FEATURE_K7, c->x86_capability);
break;
- }
-
- if (c->x86 == 15) {
- rdmsr(MSR_K7_HWCR, l, h);
- printk(KERN_INFO "CPU%d: AMD Flush Filter %sabled",
- smp_processor_id(), (l & (1<<6)) ? "dis" : "en");
- if ((flush_filter_force > 0) && (l & (1<<6))) {
- l &= ~(1<<6);
- printk(" -> Forcibly enabled");
- } else if ((flush_filter_force < 0) && !(l & (1<<6))) {
- l |= 1<<6;
- printk(" -> Forcibly disabled");
- }
- wrmsr(MSR_K7_HWCR, l, h);
- printk("\n");
}
display_cacheinfo(c);
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