[Xen-changelog] [xen-unstable] AMD: Workaround for erratum 411

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1275892689 -3600
# Node ID 0251bbc0a9a879126bce65e47e4410575cfa73de
# Parent  7ff0e885b5c30cc8573b52144b274509e04759fd
AMD: Workaround for erratum 411

Clear APIC TMICT when we mask APIC LVTT.

Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>
---
 xen/arch/x86/apic.c |    8 +++++++-
 xen/arch/x86/hpet.c |    3 +--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff -r 7ff0e885b5c3 -r 0251bbc0a9a8 xen/arch/x86/apic.c
--- a/xen/arch/x86/apic.c       Mon Jun 07 07:19:43 2010 +0100
+++ b/xen/arch/x86/apic.c       Mon Jun 07 07:38:09 2010 +0100
@@ -194,6 +194,9 @@ void clear_local_APIC(void)
     unsigned long v;
 
     maxlvt = get_maxlvt();
+
+    /* Work around AMD Erratum 411. This is a nice thing to do anyway. */
+    apic_write_around(APIC_TMICT, 0);
 
     /*
      * Masking an LVT entry on a P6 can trigger a local APIC error
@@ -1184,7 +1187,10 @@ void disable_APIC_timer(void)
 {
     if (using_apic_timer) {
         unsigned long v;
-        
+
+        /* Work around AMD Erratum 411. This is a nice thing to do anyway. */
+        apic_write_around(APIC_TMICT, 0);
+
         v = apic_read(APIC_LVTT);
         apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);
     }
diff -r 7ff0e885b5c3 -r 0251bbc0a9a8 xen/arch/x86/hpet.c
--- a/xen/arch/x86/hpet.c       Mon Jun 07 07:19:43 2010 +0100
+++ b/xen/arch/x86/hpet.c       Mon Jun 07 07:38:09 2010 +0100
@@ -662,8 +662,7 @@ void hpet_broadcast_enter(void)
         spin_unlock(&ch->lock);
     }
 
-    /* Cancel any outstanding LAPIC timer event and disable interrupts. */
-    reprogram_timer(0);
+    /* Disable LAPIC timer interrupts. */
     disable_APIC_timer();
 
     spin_lock(&ch->lock);

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