# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1272280587 -3600
# Node ID 5922e6864bc92ccc04aa890dab3ffaacc23437e0
# Parent 3ab94c7d7aa509e87dd77313a442aa8005241c87
x86, shadow: propagate pat caching on the shadow l1
PAT caching was only propagated if has_arch_pdevs(),
causing the hvm_get_mem_pinned_cacheattr() to be ignored
in the non passthrough case.
l1_disallow_mask() needs to be relaxed.
Signed-off-by: Jean Guyader <jean.guyader@xxxxxxxxxx>
xen-unstable changeset: 21236:9a1d7caa2024
xen-unstable date: Mon Apr 26 12:13:23 2010 +0100
---
xen/arch/x86/mm.c | 3 ++-
xen/arch/x86/mm/shadow/multi.c | 32 ++++++++++++++++++--------------
2 files changed, 20 insertions(+), 15 deletions(-)
diff -r 3ab94c7d7aa5 -r 5922e6864bc9 xen/arch/x86/mm.c
--- a/xen/arch/x86/mm.c Mon Apr 26 12:15:41 2010 +0100
+++ b/xen/arch/x86/mm.c Mon Apr 26 12:16:27 2010 +0100
@@ -167,7 +167,8 @@ boolean_param("allowhugepage", opt_allow
((d != dom_io) && \
(rangeset_is_empty((d)->iomem_caps) && \
rangeset_is_empty((d)->arch.ioport_caps) && \
- !has_arch_pdevs(d)) ? \
+ !has_arch_pdevs(d) && \
+ !is_hvm_domain(d)) ? \
L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS))
#ifdef CONFIG_COMPAT
diff -r 3ab94c7d7aa5 -r 5922e6864bc9 xen/arch/x86/mm/shadow/multi.c
--- a/xen/arch/x86/mm/shadow/multi.c Mon Apr 26 12:15:41 2010 +0100
+++ b/xen/arch/x86/mm/shadow/multi.c Mon Apr 26 12:16:27 2010 +0100
@@ -562,7 +562,7 @@ _sh_propagate(struct vcpu *v,
* For HVM domains with direct access to MMIO areas, set the correct
* caching attributes in the shadows to match what was asked for.
*/
- if ( (level == 1) && is_hvm_domain(d) && has_arch_pdevs(d) &&
+ if ( (level == 1) && is_hvm_domain(d) &&
!is_xen_heap_mfn(mfn_x(target_mfn)) )
{
unsigned int type;
@@ -578,20 +578,24 @@ _sh_propagate(struct vcpu *v,
sflags |= pat_type_2_pte_flags(type);
else if ( d->arch.hvm_domain.is_in_uc_mode )
sflags |= pat_type_2_pte_flags(PAT_TYPE_UNCACHABLE);
- else if ( p2mt == p2m_mmio_direct )
- sflags |= get_pat_flags(v,
- gflags,
- gfn_to_paddr(target_gfn),
- ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
- MTRR_TYPE_UNCACHABLE);
- else if ( iommu_snoop )
- sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK);
else
- sflags |= get_pat_flags(v,
- gflags,
- gfn_to_paddr(target_gfn),
- ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
- NO_HARDCODE_MEM_TYPE);
+ if ( has_arch_pdevs(d) )
+ {
+ if ( p2mt == p2m_mmio_direct )
+ sflags |= get_pat_flags(v,
+ gflags,
+ gfn_to_paddr(target_gfn),
+ ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
+ MTRR_TYPE_UNCACHABLE);
+ else if ( iommu_snoop )
+ sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK);
+ else
+ sflags |= get_pat_flags(v,
+ gflags,
+ gfn_to_paddr(target_gfn),
+ ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
+ NO_HARDCODE_MEM_TYPE);
+ }
}
// Set the A&D bits for higher level shadows.
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