[Xen-changelog] [xen-3.4-testing] Mask AMD CPUID masks in software before writing them to the MSRs

["Xen patchbot-3.4-testing" <patchbot-3.4-testing@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1266408963 0
# Node ID cd97053d4a86609873940610d32ff90fe9d1bbaa
# Parent  512e596e27328e775f4c53b459b4186ba3c18c47
Mask AMD CPUID masks in software before writing them to the MSRs

Mask AMD CPUID masks in software before writing them to the MSRs.
Setting bits in the CPUID mask MSR that are not set in the unmasked
CPUID response can cause those bits to be set in the masked response.
Avoid that by explicitly masking in software.

Signed-off-by: Tim Deegan <Tim.Deegan@xxxxxxxxxx>
xen-unstable changeset:   20953:220e4996f0e8
xen-unstable date:        Wed Feb 17 12:05:45 2010 +0000
---
 xen/arch/x86/cpu/amd.c |    8 ++++++++
 1 files changed, 8 insertions(+)

diff -r 512e596e2732 -r cd97053d4a86 xen/arch/x86/cpu/amd.c
--- a/xen/arch/x86/cpu/amd.c    Wed Feb 17 12:15:29 2010 +0000
+++ b/xen/arch/x86/cpu/amd.c    Wed Feb 17 12:16:03 2010 +0000
@@ -129,6 +129,14 @@ static void __devinit set_cpuidmask(stru
                return;
        }
 
+        /* Setting bits in the CPUID mask MSR that are not set in the
+         * unmasked CPUID response can cause those bits to be set in the
+         * masked response.  Avoid that by explicitly masking in software. */
+        feat_ecx &= cpuid_ecx(0x00000001);
+        feat_edx &= cpuid_edx(0x00000001);
+        extfeat_ecx &= cpuid_ecx(0x80000001);
+        extfeat_edx &= cpuid_edx(0x80000001);
+
        status = set_mask;
        printk("Writing CPUID feature mask ECX:EDX -> %08Xh:%08Xh\n", 
               feat_ecx, feat_edx);

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