# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1250871234 -3600
# Node ID 6e83b0ec2d70dca1538216d967dc5448a580191c
# Parent 5a23b38b970d0eb5b7909a9fa2890946670c1d03
ia64: Fix ia64 build issue introduced by per-cpu vector changes.
ia64 has no per-cpu vector support, so change the related APIs back
through defining macros.
Signed-off-by: Xiantao Zhang <xiantao.zhang@xxxxxxxxx>
---
xen/arch/ia64/xen/irq.c | 14 +++++++++++++
xen/drivers/passthrough/vtd/iommu.c | 13 +++++++++++-
xen/drivers/passthrough/vtd/x86/vtd.c | 1
xen/include/asm-ia64/msi.h | 10 +++++++++
xen/include/xen/irq.h | 36 +++++++++++++++++++++++++---------
5 files changed, 64 insertions(+), 10 deletions(-)
diff -r 5a23b38b970d -r 6e83b0ec2d70 xen/arch/ia64/xen/irq.c
--- a/xen/arch/ia64/xen/irq.c Fri Aug 21 17:13:17 2009 +0100
+++ b/xen/arch/ia64/xen/irq.c Fri Aug 21 17:13:54 2009 +0100
@@ -80,6 +80,13 @@ irq_desc_t irq_desc[NR_IRQS] = {
.handler = &no_irq_type,
.lock = SPIN_LOCK_UNLOCKED
}
+};
+
+struct irq_cfg irq_cfg[NR_IRQS] = {
+ [0 ... NR_IRQS-1] ={
+ .vector = -1,
+ .domain = CPU_MASK_ALL,
+}
};
void __do_IRQ_guest(int irq);
@@ -233,6 +240,7 @@ int setup_vector(unsigned int vector, st
unsigned long flags;
struct irqaction *old, **p;
irq_desc_t *desc = irq_descp(vector);
+ struct irq_cfg *cfg = irq_cfg(vector);
/*
* The following block of code has to be executed atomically
@@ -250,6 +258,8 @@ int setup_vector(unsigned int vector, st
desc->status &= ~(IRQ_DISABLED | IRQ_INPROGRESS | IRQ_GUEST);
desc->handler->startup(vector);
desc->handler->enable(vector);
+ desc->chip_data = cfg;
+ cfg->vector = vector;
spin_unlock_irqrestore(&desc->lock,flags);
return 0;
@@ -275,11 +285,13 @@ void release_irq_vector(unsigned int vec
{
unsigned long flags;
irq_desc_t *desc;
+ struct irq_cfg *cfg;
if ( vec == IA64_INVALID_VECTOR )
return;
desc = irq_descp(vec);
+ cfg = irq_cfg(vec);
spin_lock_irqsave(&desc->lock, flags);
clear_bit(vec, ia64_xen_vector);
@@ -287,6 +299,8 @@ void release_irq_vector(unsigned int vec
desc->depth = 1;
desc->status |= IRQ_DISABLED;
desc->handler->shutdown(vec);
+ desc->chip_data = NULL;
+ cfg->vector = -1;
spin_unlock_irqrestore(&desc->lock, flags);
while (desc->status & IRQ_INPROGRESS)
diff -r 5a23b38b970d -r 6e83b0ec2d70 xen/drivers/passthrough/vtd/iommu.c
--- a/xen/drivers/passthrough/vtd/iommu.c Fri Aug 21 17:13:17 2009 +0100
+++ b/xen/drivers/passthrough/vtd/iommu.c Fri Aug 21 17:13:54 2009 +0100
@@ -827,12 +827,13 @@ static void dma_msi_set_affinity(unsigne
struct irq_cfg *cfg = desc->chip_data;
spin_lock_irqsave(&iommu->register_lock, flags);
+#ifdef CONFIG_X86
dest = set_desc_affinity(desc, mask);
if (dest == BAD_APICID){
gdprintk(XENLOG_ERR VTDPREFIX, "Set iommu interrupt affinity
error!\n");
return;
}
-
+
memset(&msg, 0, sizeof(msg));
msg.data = MSI_DATA_VECTOR(cfg->vector) & 0xff;
msg.data |= 1 << 14;
@@ -850,6 +851,16 @@ static void dma_msi_set_affinity(unsigne
MSI_ADDR_REDIRECTION_CPU:
MSI_ADDR_REDIRECTION_LOWPRI;
msg.address_lo |= MSI_ADDR_DEST_ID(dest & 0xff);
+#else
+ memset(&msg, 0, sizeof(msg));
+ msg.data = cfg->vector & 0xff;
+ msg.data |= 1 << 14;
+ msg.address_lo = (MSI_ADDRESS_HEADER << (MSI_ADDRESS_HEADER_SHIFT + 8));
+ msg.address_lo |= MSI_PHYSICAL_MODE << 2;
+ msg.address_lo |= MSI_REDIRECTION_HINT_MODE << 3;
+ dest = cpu_physical_id(first_cpu(mask));
+ msg.address_lo |= dest << MSI_TARGET_CPU_SHIFT;
+#endif
dmar_writel(iommu->reg, DMAR_FEDATA_REG, msg.data);
dmar_writel(iommu->reg, DMAR_FEADDR_REG, msg.address_lo);
diff -r 5a23b38b970d -r 6e83b0ec2d70 xen/drivers/passthrough/vtd/x86/vtd.c
--- a/xen/drivers/passthrough/vtd/x86/vtd.c Fri Aug 21 17:13:17 2009 +0100
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c Fri Aug 21 17:13:54 2009 +0100
@@ -161,3 +161,4 @@ void iommu_set_dom0_mapping(struct domai
iommu_map_page(d, (i*tmp+j), (i*tmp+j));
}
}
+
diff -r 5a23b38b970d -r 6e83b0ec2d70 xen/include/asm-ia64/msi.h
--- a/xen/include/asm-ia64/msi.h Fri Aug 21 17:13:17 2009 +0100
+++ b/xen/include/asm-ia64/msi.h Fri Aug 21 17:13:54 2009 +0100
@@ -17,4 +17,14 @@
#define MSI_LOGICAL_MODE 1
#define MSI_REDIRECTION_HINT_MODE 0
+#define MSI_DATA_VECTOR_SHIFT 0
+#define MSI_DATA_VECTOR_MASK 0x000000ff
+#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT)
& MSI_DATA_VECTOR_MASK)
+
+struct msi_msg {
+ u32 address_lo; /* low 32 bits of msi message address */
+ u32 address_hi; /* high 32 bits of msi message address */
+ u32 data; /* 16 bits of msi message data */
+};
+
#endif /* __ASM_MSI_H */
diff -r 5a23b38b970d -r 6e83b0ec2d70 xen/include/xen/irq.h
--- a/xen/include/xen/irq.h Fri Aug 21 17:13:17 2009 +0100
+++ b/xen/include/xen/irq.h Fri Aug 21 17:13:54 2009 +0100
@@ -50,6 +50,7 @@ typedef struct hw_interrupt_type hw_irq_
#include <asm/irq.h>
#ifdef NR_IRQS
+# define nr_irqs NR_IRQS
# define nr_irqs_gsi NR_IRQS
#else
extern unsigned int nr_irqs_gsi;
@@ -57,6 +58,7 @@ extern unsigned int nr_irqs;
#endif
struct msi_desc;
+struct irq_cfg;
/*
* This is the "IRQ descriptor", which contains various information
* about the irq, including what kind of hardware handling it has,
@@ -70,9 +72,7 @@ typedef struct irq_desc{
struct msi_desc *msi_desc;
struct irqaction *action; /* IRQ action list */
unsigned int depth; /* nested irq disables */
-#if defined(__i386__) || defined(__x86_64__)
struct irq_cfg *chip_data;
-#endif
int irq;
spinlock_t lock;
cpumask_t affinity;
@@ -82,13 +82,35 @@ extern irq_desc_t irq_desc[NR_VECTORS];
extern irq_desc_t irq_desc[NR_VECTORS];
#define setup_irq(irq, action) \
- setup_irq_vector(irq_to_vector(irq), action)
+ setup_irq_vector(irq, action)
#define release_irq(irq) \
- release_irq_vector(irq_to_vector(irq))
+ release_irq_vector(irq)
#define request_irq(irq, handler, irqflags, devname, devid) \
- request_irq_vector(irq_to_vector(irq), handler, irqflags, devname, devid)
+ request_irq_vector(irq, handler, irqflags, devname, devid)
+
+extern int request_irq_vector(unsigned int vector,
+ void (*handler)(int, void *, struct cpu_user_regs *),
+ unsigned long irqflags, const char * devname, void *dev_id);
+
+#define create_irq(x) assign_irq_vector(AUTO_ASSIGN_IRQ)
+#define destroy_irq(x) free_irq_vector(x)
+
+#define irq_cfg(x) &irq_cfg[(x)]
+#define irq_to_desc(x) &irq_desc[(x)]
+
+#define irq_complete_move(x) do {} \
+ while(!x)
+
+#define domain_pirq_to_irq(d, irq) domain_irq_to_vector(d, irq)
+
+struct irq_cfg {
+ int vector;
+ cpumask_t domain;
+};
+
+extern struct irq_cfg irq_cfg[];
#else
extern struct irq_desc *irq_desc;
@@ -119,11 +141,7 @@ static inline void set_native_irq_info(u
static inline void set_irq_info(int irq, cpumask_t mask)
{
-#if defined(__i386__) || defined(__x86_64__)
set_native_irq_info(irq, mask);
-#else
- set_native_irq_info(irq_to_vector(irq), mask);
-#endif
}
unsigned int set_desc_affinity(struct irq_desc *desc, cpumask_t mask);
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