# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1239970599 -3600
# Node ID 226ef307cd2e632d9d92b1c9498a665c353f5c37
# Parent b44db970f6b7fe9ff2945e5ed4c2a3bf34487f12
AMD IOMMU: Fix ioapic interrupt remapping
A few ioapic redirection entries are initialized by hypervisor before
enabling iommu hardware. This patch copies those entries from ioapic
redirection table into interrupt remapping table after interrupt
remapping table has been allocated.
Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>
---
xen/drivers/passthrough/amd/iommu_intr.c | 34 +++++++++++++++++++++++++++++++
1 files changed, 34 insertions(+)
diff -r b44db970f6b7 -r 226ef307cd2e xen/drivers/passthrough/amd/iommu_intr.c
--- a/xen/drivers/passthrough/amd/iommu_intr.c Fri Apr 17 13:14:01 2009 +0100
+++ b/xen/drivers/passthrough/amd/iommu_intr.c Fri Apr 17 13:16:39 2009 +0100
@@ -108,8 +108,17 @@ static void update_intremap_entry_from_i
return;
}
+extern int nr_ioapic_registers[MAX_IO_APICS];
+extern int nr_ioapics;
+
int __init amd_iommu_setup_intremap_table(void)
{
+ struct IO_APIC_route_entry rte = {0};
+ unsigned long flags;
+ u32* entry;
+ int apic, pin;
+ u8 delivery_mode, dest, vector, dest_mode;
+
if ( int_remap_table == NULL )
{
int_remap_table = __alloc_amd_iommu_tables(INTREMAP_TABLE_ORDER);
@@ -118,6 +127,31 @@ int __init amd_iommu_setup_intremap_tabl
memset(int_remap_table, 0, PAGE_SIZE * (1UL << INTREMAP_TABLE_ORDER));
}
+ /* Read ioapic entries and update interrupt remapping table accordingly */
+ for ( apic = 0; apic < nr_ioapics; apic++ )
+ {
+ for ( pin = 0; pin < nr_ioapic_registers[apic]; pin++ )
+ {
+ *(((int *)&rte) + 1) = io_apic_read(apic, 0x11 + 2 * pin);
+ *(((int *)&rte) + 0) = io_apic_read(apic, 0x10 + 2 * pin);
+
+ if ( rte.mask == 1 )
+ continue;
+
+ delivery_mode = rte.delivery_mode;
+ vector = rte.vector;
+ dest_mode = rte.dest_mode;
+ if ( dest_mode == 0 )
+ dest = rte.dest.physical.physical_dest & 0xf;
+ else
+ dest = rte.dest.logical.logical_dest & 0xff;
+
+ spin_lock_irqsave(&int_remap_table_lock, flags);
+ entry = (u32*)get_intremap_entry(vector, delivery_mode);
+ update_intremap_entry(entry, vector, delivery_mode, dest_mode,
dest);
+ spin_unlock_irqrestore(&int_remap_table_lock, flags);
+ }
+ }
return 0;
}
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