# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1236930036 0
# Node ID ea67a65cec173c719a3a6ea65ffa4c823fb36549
# Parent 6dd975d12fd3ad4a3dde7de0c5477efe9c62fe13
Backport: PCI: export __pci_read_base()
commit 0b400c7ed4d027e02f6231afa39852a2d48e6f25
Author: Yu Zhao <yu.zhao@xxxxxxxxx>
Date: Sat Nov 22 02:40:40 2008 +0800
PCI: export __pci_read_base()
Export __pci_read_base() so it can be used by whole PCI subsystem.
Signed-off-by: Yu Zhao <yu.zhao@xxxxxxxxx>
Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
Signed-off-by: Yu Zhao <yu.zhao@xxxxxxxxx>
---
drivers/pci/pci.h | 10 ++++++++++
drivers/pci/probe.c | 22 ++++++++++------------
2 files changed, 20 insertions(+), 12 deletions(-)
diff -r 6dd975d12fd3 -r ea67a65cec17 drivers/pci/pci.h
--- a/drivers/pci/pci.h Fri Mar 13 07:40:22 2009 +0000
+++ b/drivers/pci/pci.h Fri Mar 13 07:40:36 2009 +0000
@@ -109,3 +109,13 @@ extern void pci_disable_bridge_window(st
#ifdef CONFIG_PCI_GUESTDEV
int pci_is_guestdev_to_reassign(struct pci_dev *dev);
#endif /* CONFIG_PCI_GUESTDEV */
+
+enum pci_bar_type {
+ pci_bar_unknown, /* Standard PCI BAR probe */
+ pci_bar_io, /* An io port BAR */
+ pci_bar_mem32, /* A 32-bit memory BAR */
+ pci_bar_mem64, /* A 64-bit memory BAR */
+};
+
+extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+ struct resource *res, unsigned int reg);
diff -r 6dd975d12fd3 -r ea67a65cec17 drivers/pci/probe.c
--- a/drivers/pci/probe.c Fri Mar 13 07:40:22 2009 +0000
+++ b/drivers/pci/probe.c Fri Mar 13 07:40:36 2009 +0000
@@ -141,13 +141,6 @@ static u64 pci_size(u64 base, u64 maxbas
return size;
}
-enum pci_bar_type {
- pci_bar_unknown, /* Standard PCI BAR probe */
- pci_bar_io, /* An io port BAR */
- pci_bar_mem32, /* A 32-bit memory BAR */
- pci_bar_mem64, /* A 64-bit memory BAR */
-};
-
static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
{
if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
@@ -162,11 +155,16 @@ static inline enum pci_bar_type decode_b
return pci_bar_mem32;
}
-/*
- * If the type is not unknown, we assume that the lowest bit is 'enable'.
- * Returns 1 if the BAR was 64-bit and 0 if it was 32-bit.
- */
-static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+/**
+ * pci_read_base - read a PCI BAR
+ * @dev: the PCI device
+ * @type: type of the BAR
+ * @res: resource buffer to be filled in
+ * @pos: BAR position in the config space
+ *
+ * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
+ */
+int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
struct resource *res, unsigned int pos)
{
u32 l, sz, mask;
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