[Xen-changelog] [xen-unstable] xen, pci: Fix the definition of PCI_PM_CTRL_NO_SOFT_RESET.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1235991666 0
# Node ID 4dac26349877cbca0bc727286d4ddaeb190dff4b
# Parent  c9e9602cc080daef0c25869cdec21b4e323fd6dd
xen, pci: Fix the definition of PCI_PM_CTRL_NO_SOFT_RESET.

Signed-off-by: Dexuan Cui <dexuan.cui@xxxxxxxxx>
---
 xen/include/asm-ia64/linux/pci_regs.h |    2 +-
 xen/include/xen/pci_regs.h            |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff -r c9e9602cc080 -r 4dac26349877 xen/include/asm-ia64/linux/pci_regs.h
--- a/xen/include/asm-ia64/linux/pci_regs.h     Mon Mar 02 10:52:07 2009 +0000
+++ b/xen/include/asm-ia64/linux/pci_regs.h     Mon Mar 02 11:01:06 2009 +0000
@@ -229,7 +229,7 @@
 #define  PCI_PM_CAP_PME_D3cold 0x8000  /* PME# from D3 (cold) */
 #define PCI_PM_CTRL            4       /* PM control and status register */
 #define  PCI_PM_CTRL_STATE_MASK        0x0003  /* Current power state (D0 to 
D3) */
-#define  PCI_PM_CTRL_NO_SOFT_RESET     0x0004  /* No reset for D3hot->D0 */
+#define  PCI_PM_CTRL_NO_SOFT_RESET     0x0008  /* No reset for D3hot->D0 */
 #define  PCI_PM_CTRL_PME_ENABLE        0x0100  /* PME pin enable */
 #define  PCI_PM_CTRL_DATA_SEL_MASK     0x1e00  /* Data select (??) */
 #define  PCI_PM_CTRL_DATA_SCALE_MASK   0x6000  /* Data scale (??) */
diff -r c9e9602cc080 -r 4dac26349877 xen/include/xen/pci_regs.h
--- a/xen/include/xen/pci_regs.h        Mon Mar 02 10:52:07 2009 +0000
+++ b/xen/include/xen/pci_regs.h        Mon Mar 02 11:01:06 2009 +0000
@@ -233,7 +233,7 @@
 #define  PCI_PM_CAP_PME_D3cold 0x8000  /* PME# from D3 (cold) */
 #define PCI_PM_CTRL            4       /* PM control and status register */
 #define  PCI_PM_CTRL_STATE_MASK        0x0003  /* Current power state (D0 to 
D3) */
-#define  PCI_PM_CTRL_NO_SOFT_RESET     0x0004  /* No reset for D3hot->D0 */
+#define  PCI_PM_CTRL_NO_SOFT_RESET     0x0008  /* No reset for D3hot->D0 */
 #define  PCI_PM_CTRL_PME_ENABLE        0x0100  /* PME pin enable */
 #define  PCI_PM_CTRL_DATA_SEL_MASK     0x1e00  /* Data select (??) */
 #define  PCI_PM_CTRL_DATA_SCALE_MASK   0x6000  /* Data scale (??) */

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