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xen-changelog
[Xen-changelog] [xen-unstable] x86 Cx: Add option hpetbroadcast to force
# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1216213054 -3600
# Node ID 806e66a6cb1a19a25c9db33fa35a3294280f5d94
# Parent 099aaca15ae6e9339c7c32d9488688ce99b37f5c
x86 Cx: Add option hpetbroadcast to force enabling hpet_broadcast.
This option can be used for test & experiment purpose.
Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>
---
xen/arch/x86/time.c | 41 ++++++++++++++++++++++++++++-------------
1 files changed, 28 insertions(+), 13 deletions(-)
diff -r 099aaca15ae6 -r 806e66a6cb1a xen/arch/x86/time.c
--- a/xen/arch/x86/time.c Wed Jul 16 13:54:02 2008 +0100
+++ b/xen/arch/x86/time.c Wed Jul 16 13:57:34 2008 +0100
@@ -1079,22 +1079,37 @@ void __init early_time_init(void)
setup_irq(0, &irq0);
}
+/* force_hpet_broadcast: if true, force using hpet_broadcast to fix lapic stop
+ issue for deep C state with pit disabled */
+static int force_hpet_broadcast;
+boolean_param("hpetbroadcast", force_hpet_broadcast);
+
/* keep pit enabled for pit_broadcast working while cpuidle enabled */
static int disable_pit_irq(void)
{
- if ( !using_pit && cpu_has_apic && !xen_cpuidle )
- {
- /* Disable PIT CH0 timer interrupt. */
- outb_p(0x30, PIT_MODE);
- outb_p(0, PIT_CH0);
- outb_p(0, PIT_CH0);
-
- /*
- * If we do not rely on PIT CH0 then we can use HPET for one-shot
- * timer emulation when entering deep C states.
- */
- /*hpet_broadcast_init(); XXX dom0 may rely on RTC interrupt delivery */
- }
+ if ( using_pit || !cpu_has_apic || (xen_cpuidle && !force_hpet_broadcast) )
+ return 0;
+
+ /*
+ * If we do not rely on PIT CH0 then we can use HPET for one-shot timer
+ * emulation when entering deep C states.
+ * XXX dom0 may rely on RTC interrupt delivery, so only enable
+ * hpet_broadcast if force_hpet_broadcast.
+ */
+ if ( xen_cpuidle && force_hpet_broadcast )
+ {
+ hpet_broadcast_init();
+ if ( !hpet_broadcast_is_available() )
+ {
+ printk("HPET broadcast init failed, turn to PIT broadcast.\n");
+ return 0;
+ }
+ }
+
+ /* Disable PIT CH0 timer interrupt. */
+ outb_p(0x30, PIT_MODE);
+ outb_p(0, PIT_CH0);
+ outb_p(0, PIT_CH0);
return 0;
}
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