[Xen-changelog] [xen-unstable] ioemu: Explicitly define certain PCI/MSI macros.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1215079183 -3600
# Node ID 57f3099198320d753e293244a60f30387e4bdb11
# Parent  3f3510b352682c44c269257f77fb0d0d8602506e
ioemu: Explicitly define certain PCI/MSI macros.
From: Haitao Shan <haitao.shan@xxxxxxxxx>
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
 tools/ioemu/hw/pt-msi.h |   26 ++++++++++++++++++++++++--
 1 files changed, 24 insertions(+), 2 deletions(-)

diff -r 3f3510b35268 -r 57f309919832 tools/ioemu/hw/pt-msi.h
--- a/tools/ioemu/hw/pt-msi.h   Thu Jul 03 10:57:51 2008 +0100
+++ b/tools/ioemu/hw/pt-msi.h   Thu Jul 03 10:59:43 2008 +0100
@@ -2,9 +2,31 @@
 #define _PT_MSI_H
 
 #include "vl.h"
-#include "pci/header.h"
 #include "pci/pci.h"
 #include "pass-through.h"
+
+#define  PCI_CAP_ID_MSI     0x05    /* Message Signalled Interrupts */
+#define  PCI_CAP_ID_MSIX    0x11    /* MSI-X */
+
+/* Message Signalled Interrupts registers */
+#define PCI_MSI_FLAGS       2   /* Various flags */
+#define  PCI_MSI_FLAGS_64BIT    0x80    /* 64-bit addresses allowed */
+#define  PCI_MSI_FLAGS_QSIZE    0x70    /* Message queue size configured */
+#define  PCI_MSI_FLAGS_QMASK    0x0e    /* Maximum queue size available */
+#define  PCI_MSI_FLAGS_ENABLE   0x01    /* MSI feature enabled */
+#define PCI_MSI_RFU         3   /* Rest of capability flags */
+#define PCI_MSI_ADDRESS_LO  4   /* Lower 32 bits */
+#define PCI_MSI_ADDRESS_HI  8   /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) 
*/
+#define PCI_MSI_DATA_32     8   /* 16 bits of data for 32-bit devices */
+#define PCI_MSI_DATA_64     12  /* 16 bits of data for 64-bit devices */
+
+/* MSI-X */
+#define  PCI_MSIX_ENABLE    0x8000
+#define  PCI_MSIX_MASK      0x4000
+#define  PCI_MSIX_TABSIZE   0x03ff
+#define PCI_MSIX_TABLE      4
+#define PCI_MSIX_PBA        8
+#define  PCI_MSIX_BIR       0x7
 
 #define MSI_FLAG_UNINIT 0x1000
 #define PT_MSI_MAPPED   0x2000
@@ -29,7 +51,7 @@
    + */
 
 #define MSI_ADDR_HEADER                0xfee00000
-#define MSI_TARGET_CPU_SHIFT                  12
+#define MSI_TARGET_CPU_SHIFT           12
 
 #define MSI_ADDR_DESTID_MASK           0xfff0000f
 #define     MSI_ADDR_DESTID_CPU(cpu)   ((cpu) << MSI_TARGET_CPU_SHIFT)

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