# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1210671649 -3600
# Node ID 1b7042d60351dd876e501f47e8ffcc270986cbdc
# Parent 5d9430d492e3577d4c45909bef58710ad6a513b5
Intel vmx: To correctly detect default1 vmx features which may
actually be switched to 0, we must check VMX_BASIC_MSR[55] and
possibly check a set of 'true' feature MSRs.
Signed-off-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
xen/arch/x86/hvm/vmx/vmcs.c | 32 +++++++++++++++++++-------------
xen/include/asm-x86/msr-index.h | 4 ++++
2 files changed, 23 insertions(+), 13 deletions(-)
diff -r 5d9430d492e3 -r 1b7042d60351 xen/arch/x86/hvm/vmx/vmcs.c
--- a/xen/arch/x86/hvm/vmx/vmcs.c Tue May 13 10:19:54 2008 +0100
+++ b/xen/arch/x86/hvm/vmx/vmcs.c Tue May 13 10:40:49 2008 +0100
@@ -72,12 +72,14 @@ static u32 adjust_vmx_controls(u32 ctl_m
static void vmx_init_vmcs_config(void)
{
- u32 vmx_msr_low, vmx_msr_high, min, opt;
+ u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt;
u32 _vmx_pin_based_exec_control;
u32 _vmx_cpu_based_exec_control;
u32 _vmx_secondary_exec_control = 0;
u32 _vmx_vmexit_control;
u32 _vmx_vmentry_control;
+
+ rdmsr(MSR_IA32_VMX_BASIC, vmx_basic_msr_low, vmx_basic_msr_high);
min = (PIN_BASED_EXT_INTR_MASK |
PIN_BASED_NMI_EXITING);
@@ -122,9 +124,14 @@ static void vmx_init_vmcs_config(void)
if ( _vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT )
{
- /* To use EPT we expect to be able to clear certain intercepts. */
- uint32_t must_be_one, must_be_zero;
- rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, must_be_one, must_be_zero);
+ /*
+ * To use EPT we expect to be able to clear certain intercepts.
+ * We check VMX_BASIC_MSR[55] to correctly handle default1 controls.
+ */
+ uint32_t must_be_one, must_be_zero, msr = MSR_IA32_VMX_PROCBASED_CTLS;
+ if ( vmx_basic_msr_high & (1u << 23) )
+ msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS;
+ rdmsr(msr, must_be_one, must_be_zero);
if ( must_be_one & (CPU_BASED_INVLPG_EXITING |
CPU_BASED_CR3_LOAD_EXITING |
CPU_BASED_CR3_STORE_EXITING) )
@@ -150,41 +157,40 @@ static void vmx_init_vmcs_config(void)
_vmx_vmentry_control = adjust_vmx_controls(
min, opt, MSR_IA32_VMX_ENTRY_CTLS);
- rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
-
if ( !vmx_pin_based_exec_control )
{
/* First time through. */
- vmcs_revision_id = vmx_msr_low;
+ vmcs_revision_id = vmx_basic_msr_low;
vmx_pin_based_exec_control = _vmx_pin_based_exec_control;
vmx_cpu_based_exec_control = _vmx_cpu_based_exec_control;
vmx_secondary_exec_control = _vmx_secondary_exec_control;
vmx_vmexit_control = _vmx_vmexit_control;
vmx_vmentry_control = _vmx_vmentry_control;
- cpu_has_vmx_ins_outs_instr_info = !!(vmx_msr_high & (1U<<22));
+ cpu_has_vmx_ins_outs_instr_info = !!(vmx_basic_msr_high & (1U<<22));
}
else
{
/* Globals are already initialised: re-check them. */
- BUG_ON(vmcs_revision_id != vmx_msr_low);
+ BUG_ON(vmcs_revision_id != vmx_basic_msr_low);
BUG_ON(vmx_pin_based_exec_control != _vmx_pin_based_exec_control);
BUG_ON(vmx_cpu_based_exec_control != _vmx_cpu_based_exec_control);
BUG_ON(vmx_secondary_exec_control != _vmx_secondary_exec_control);
BUG_ON(vmx_vmexit_control != _vmx_vmexit_control);
BUG_ON(vmx_vmentry_control != _vmx_vmentry_control);
- BUG_ON(cpu_has_vmx_ins_outs_instr_info != !!(vmx_msr_high & (1U<<22)));
+ BUG_ON(cpu_has_vmx_ins_outs_instr_info !=
+ !!(vmx_basic_msr_high & (1U<<22)));
}
/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
- BUG_ON((vmx_msr_high & 0x1fff) > PAGE_SIZE);
+ BUG_ON((vmx_basic_msr_high & 0x1fff) > PAGE_SIZE);
#ifdef __x86_64__
/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
- BUG_ON(vmx_msr_high & (1u<<16));
+ BUG_ON(vmx_basic_msr_high & (1u<<16));
#endif
/* Require Write-Back (WB) memory type for VMCS accesses. */
- BUG_ON(((vmx_msr_high >> 18) & 15) != 6);
+ BUG_ON(((vmx_basic_msr_high >> 18) & 15) != 6);
}
static struct vmcs_struct *vmx_alloc_vmcs(void)
diff -r 5d9430d492e3 -r 1b7042d60351 xen/include/asm-x86/msr-index.h
--- a/xen/include/asm-x86/msr-index.h Tue May 13 10:19:54 2008 +0100
+++ b/xen/include/asm-x86/msr-index.h Tue May 13 10:40:49 2008 +0100
@@ -135,6 +135,10 @@
#define MSR_IA32_VMX_CR4_FIXED0 0x488
#define MSR_IA32_VMX_CR4_FIXED1 0x489
#define MSR_IA32_VMX_PROCBASED_CTLS2 0x48b
+#define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x48d
+#define MSR_IA32_VMX_TRUE_PROCBASED_CTLS 0x48e
+#define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x48f
+#define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x490
#define IA32_FEATURE_CONTROL_MSR 0x3a
#define IA32_FEATURE_CONTROL_MSR_LOCK 0x0001
#define IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_INSIDE_SMX 0x0002
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