# HG changeset patch
# User Alex Williamson <alex.williamson@xxxxxx>
# Date 1203017835 25200
# Node ID 29faad225cbbdb63438088f02361f260ffab807a
# Parent d8fbfd8ef184056f168d490040c2a9da4d56fdff
[IA64] Make translate_phy_pte() static
Second argument pte doesn't need to be a pointer.
Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
---
xen/arch/ia64/vmx/vtlb.c | 22 +++++++++-------------
xen/include/asm-ia64/vmmu.h | 1 -
2 files changed, 9 insertions(+), 14 deletions(-)
diff -r d8fbfd8ef184 -r 29faad225cbb xen/arch/ia64/vmx/vtlb.c
--- a/xen/arch/ia64/vmx/vtlb.c Thu Feb 14 12:20:11 2008 -0700
+++ b/xen/arch/ia64/vmx/vtlb.c Thu Feb 14 12:37:15 2008 -0700
@@ -24,6 +24,7 @@
#include <asm/vmx_phy_mode.h>
#include <asm/shadow.h>
+static u64 translate_phy_pte(VCPU *v, u64 pte, u64 itir, u64 va);
static thash_data_t *__alloc_chain(thash_cb_t *);
static inline void cch_mem_init(thash_cb_t *hcb)
@@ -183,7 +184,7 @@ void thash_vhpt_insert(VCPU *v, u64 pte,
u64 phy_pte, psr;
ia64_rr mrr;
- phy_pte = translate_phy_pte(v, &pte, itir, va);
+ phy_pte = translate_phy_pte(v, pte, itir, va);
mrr.rrval = ia64_get_rr(va);
if (itir_ps(itir) >= mrr.ps && VMX_MMU_MODE(v) != VMX_MMU_PHY_D) {
@@ -510,23 +511,20 @@ void thash_purge_entries_remote(VCPU *v,
vhpt_purge(v, va, ps);
}
-u64 translate_phy_pte(VCPU *v, u64 *pte, u64 itir, u64 va)
+static u64 translate_phy_pte(VCPU *v, u64 pte, u64 itir, u64 va)
{
u64 ps, ps_mask, paddr, maddr;
-// ia64_rr rr;
union pte_flags phy_pte;
struct domain *d = v->domain;
ps = itir_ps(itir);
ps_mask = ~((1UL << ps) - 1);
- phy_pte.val = *pte;
- paddr = *pte;
- paddr = ((paddr & _PAGE_PPN_MASK) & ps_mask) | (va & ~ps_mask);
+ phy_pte.val = pte;
+ paddr = ((pte & _PAGE_PPN_MASK) & ps_mask) | (va & ~ps_mask);
maddr = lookup_domain_mpa(d, paddr, NULL);
- if (maddr & GPFN_IO_MASK) {
- *pte |= VTLB_PTE_IO;
+ if (maddr & GPFN_IO_MASK)
return -1;
- }
+
/* Ensure WB attribute if pte is related to a normal mem page,
* which is required by vga acceleration since qemu maps shared
* vram buffer with WB.
@@ -534,8 +532,6 @@ u64 translate_phy_pte(VCPU *v, u64 *pte,
if (phy_pte.ma != VA_MATTR_NATPAGE)
phy_pte.ma = VA_MATTR_WB;
-// rr.rrval = ia64_get_rr(va);
-// ps = rr.ps;
maddr = ((maddr & _PAGE_PPN_MASK) & PAGE_MASK) | (paddr & ~PAGE_MASK);
phy_pte.ppn = maddr >> ARCH_PAGE_SHIFT;
@@ -567,12 +563,12 @@ int thash_purge_and_insert(VCPU *v, u64
ps = itir_ps(itir);
mrr.rrval = ia64_get_rr(ifa);
- phy_pte = translate_phy_pte(v, &pte, itir, ifa);
+ phy_pte = translate_phy_pte(v, pte, itir, ifa);
vtlb_purge(v, ifa, ps);
vhpt_purge(v, ifa, ps);
- if (pte & VTLB_PTE_IO) {
+ if (phy_pte == -1) {
vtlb_insert(v, pte, itir, ifa);
return 1;
}
diff -r d8fbfd8ef184 -r 29faad225cbb xen/include/asm-ia64/vmmu.h
--- a/xen/include/asm-ia64/vmmu.h Thu Feb 14 12:20:11 2008 -0700
+++ b/xen/include/asm-ia64/vmmu.h Thu Feb 14 12:37:15 2008 -0700
@@ -198,7 +198,6 @@ extern unsigned long fetch_code(struct v
extern unsigned long fetch_code(struct vcpu *vcpu, u64 gip, IA64_BUNDLE
*pbundle);
extern void emulate_io_inst(struct vcpu *vcpu, u64 padr, u64 ma);
extern int vhpt_enabled(struct vcpu *vcpu, uint64_t vadr, vhpt_ref_t ref);
-extern u64 translate_phy_pte(struct vcpu *v, u64 *pte, u64 itir, u64 va);
extern void thash_vhpt_insert(struct vcpu *v, u64 pte, u64 itir, u64 ifa,
int type);
extern u64 guest_vhpt_lookup(u64 iha, u64 *pte);
_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog
|
Home