# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1196958517 0
# Node ID ed0b98cf3a590ffa9b2db458d6215a1969e623e9
# Parent 6bf00a194bf6833a6f126bc518ae337c56be3ee5
x86: GDT reserved page should be a full page.
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
xen-unstable changeset: 16376:6c544894b8b2d2329ad1aa991ae25ebf8e1764d3
xen-unstable date: Tue Nov 13 19:21:00 2007 +0000
---
xen/arch/x86/boot/x86_32.S | 22 +++++++++++-----------
xen/arch/x86/boot/x86_64.S | 5 +----
2 files changed, 12 insertions(+), 15 deletions(-)
diff -r 6bf00a194bf6 -r ed0b98cf3a59 xen/arch/x86/boot/x86_32.S
--- a/xen/arch/x86/boot/x86_32.S Thu Dec 06 16:28:00 2007 +0000
+++ b/xen/arch/x86/boot/x86_32.S Thu Dec 06 16:28:37 2007 +0000
@@ -80,6 +80,16 @@ gdt_descr:
.word LAST_RESERVED_GDT_BYTE
.long gdt_table - FIRST_RESERVED_GDT_BYTE
+
+#ifdef CONFIG_X86_PAE
+ .align 32
+ENTRY(idle_pg_table)
+ .long sym_phys(idle_pg_table_l2) + 0*PAGE_SIZE + 0x01, 0
+ .long sym_phys(idle_pg_table_l2) + 1*PAGE_SIZE + 0x01, 0
+ .long sym_phys(idle_pg_table_l2) + 2*PAGE_SIZE + 0x01, 0
+ .long sym_phys(idle_pg_table_l2) + 3*PAGE_SIZE + 0x01, 0
+#endif
+
.align PAGE_SIZE, 0
/* NB. Rings != 0 get access up to MACH2PHYS_VIRT_END. This allows access to */
/* the machine->physical mapping table. Ring 0 can access all memory. */
@@ -94,14 +104,4 @@ ENTRY(gdt_table)
GUEST_DESC(0x00c0b200) /* 0xe021 ring 1 3.xxGB data at 0x0 */
GUEST_DESC(0x00c0fa00) /* 0xe02b ring 3 3.xxGB code at 0x0 */
GUEST_DESC(0x00c0f200) /* 0xe033 ring 3 3.xxGB data at 0x0 */
- .quad 0x0000000000000000 /* unused */
- .fill 2*NR_CPUS,8,0 /* space for TSS and LDT per CPU */
-
-#ifdef CONFIG_X86_PAE
- .align 32
-ENTRY(idle_pg_table)
- .long sym_phys(idle_pg_table_l2) + 0*PAGE_SIZE + 0x01, 0
- .long sym_phys(idle_pg_table_l2) + 1*PAGE_SIZE + 0x01, 0
- .long sym_phys(idle_pg_table_l2) + 2*PAGE_SIZE + 0x01, 0
- .long sym_phys(idle_pg_table_l2) + 3*PAGE_SIZE + 0x01, 0
-#endif
+ .align PAGE_SIZE,0
diff -r 6bf00a194bf6 -r ed0b98cf3a59 xen/arch/x86/boot/x86_64.S
--- a/xen/arch/x86/boot/x86_64.S Thu Dec 06 16:28:00 2007 +0000
+++ b/xen/arch/x86/boot/x86_64.S Thu Dec 06 16:28:37 2007 +0000
@@ -105,8 +105,6 @@ ENTRY(gdt_table)
.quad 0x00cff2000000ffff /* 0xe02b ring 3 data */
.quad 0x00affa000000ffff /* 0xe033 ring 3 code, 64-bit mode */
.quad 0x00cf9a000000ffff /* 0xe038 ring 0 code, compatibility */
- .org gdt_table - FIRST_RESERVED_GDT_BYTE + __TSS(0) * 8
- .fill 4*NR_CPUS,8,0 /* space for TSS and LDT per CPU */
.align PAGE_SIZE, 0
/* NB. Even rings != 0 get access to the full 4Gb, as only the */
@@ -120,5 +118,4 @@ ENTRY(compat_gdt_table)
.quad 0x00cffa000000ffff /* 0xe02b ring 3 code, compatibility */
.quad 0x00cff2000000ffff /* 0xe033 ring 3 data */
.quad 0x00cf9a000000ffff /* 0xe038 ring 0 code, compatibility */
- .org compat_gdt_table - FIRST_RESERVED_GDT_BYTE + __TSS(0) * 8
- .fill 4*NR_CPUS,8,0 /* space for TSS and LDT per CPU */
+ .align PAGE_SIZE, 0
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