# HG changeset patch
# User Alex Williamson <alex.williamson@xxxxxx>
# Date 1196278348 25200
# Node ID 0cc58b6dfeb2bd5c1600eb8d783e18623c6c4fff
# Parent 98defc4f3bf924f42a771e43cfb4ff4d45b54234
[IA64] vcpu_setcontext: only set cr_irr if VGCF_SET_CR_IRR flag is set.
cr_irr can be modified even when a vcpu is blocked (by itv handler).
Unconditionally setting cr_irr can trouble debugger as it may clear a bit
of cr_irr and thus miss an interrupt. This can be very annoying if the
interrupt is itv and the vcpu is inside PAL_HALT_LIGHT (the vcpu stays
blocked forever).
Signed-off-by: Tristan Gingold <tgingold@xxxxxxx>
---
tools/libxc/ia64/xc_ia64_linux_restore.c | 2 +-
xen/arch/ia64/vmx/vmx_vcpu_save.c | 16 +++++++++-------
xen/include/public/arch-ia64.h | 1 +
3 files changed, 11 insertions(+), 8 deletions(-)
diff -r 98defc4f3bf9 -r 0cc58b6dfeb2 tools/libxc/ia64/xc_ia64_linux_restore.c
--- a/tools/libxc/ia64/xc_ia64_linux_restore.c Mon Nov 26 10:07:30 2007 -0700
+++ b/tools/libxc/ia64/xc_ia64_linux_restore.c Wed Nov 28 12:32:28 2007 -0700
@@ -127,7 +127,7 @@ xc_ia64_recv_vcpu_context(int xc_handle,
fprintf(stderr, "ip=%016lx, b0=%016lx\n", ctxt->regs.ip, ctxt->regs.b[0]);
/* Initialize and set registers. */
- ctxt->flags = VGCF_EXTRA_REGS;
+ ctxt->flags = VGCF_EXTRA_REGS | VGCF_SET_CR_IRR;
if (xc_vcpu_setcontext(xc_handle, dom, vcpu, ctxt) != 0) {
ERROR("Couldn't set vcpu context");
return -1;
diff -r 98defc4f3bf9 -r 0cc58b6dfeb2 xen/arch/ia64/vmx/vmx_vcpu_save.c
--- a/xen/arch/ia64/vmx/vmx_vcpu_save.c Mon Nov 26 10:07:30 2007 -0700
+++ b/xen/arch/ia64/vmx/vmx_vcpu_save.c Wed Nov 28 12:32:28 2007 -0700
@@ -118,8 +118,8 @@ vmx_arch_set_info_guest(struct vcpu *v,
unsigned long vnat;
unsigned long vbnat;
- union vcpu_ar_regs *ar = &c.nat->regs.ar;
- union vcpu_cr_regs *cr = &c.nat->regs.cr;
+ union vcpu_ar_regs *ar = &c.nat->regs.ar;
+ union vcpu_cr_regs *cr = &c.nat->regs.cr;
int i;
// banked registers
@@ -177,13 +177,15 @@ vmx_arch_set_info_guest(struct vcpu *v,
vpd_low->iim = cr->iim;
vpd_low->iha = cr->iha;
vpd_low->lid = cr->lid;
+ vpd_low->tpr = cr->tpr;
vpd_low->ivr = cr->ivr; //XXX vlsapic
- vpd_low->tpr = cr->tpr;
vpd_low->eoi = cr->eoi;
- vpd_low->irr[0] = cr->irr[0];
- vpd_low->irr[1] = cr->irr[1];
- vpd_low->irr[2] = cr->irr[2];
- vpd_low->irr[3] = cr->irr[3];
+ if (c.nat->flags & VGCF_SET_CR_IRR) {
+ vpd_low->irr[0] = cr->irr[0];
+ vpd_low->irr[1] = cr->irr[1];
+ vpd_low->irr[2] = cr->irr[2];
+ vpd_low->irr[3] = cr->irr[3];
+ }
vpd_low->itv = cr->itv;
vpd_low->pmv = cr->pmv;
vpd_low->cmcv = cr->cmcv;
diff -r 98defc4f3bf9 -r 0cc58b6dfeb2 xen/include/public/arch-ia64.h
--- a/xen/include/public/arch-ia64.h Mon Nov 26 10:07:30 2007 -0700
+++ b/xen/include/public/arch-ia64.h Wed Nov 28 12:32:28 2007 -0700
@@ -435,6 +435,7 @@ struct vcpu_guest_context_regs {
struct vcpu_guest_context {
#define VGCF_EXTRA_REGS (1UL << 1) /* Set extra regs. */
+#define VGCF_SET_CR_IRR (1UL << 2) /* Set cr_irr[0:3]. */
unsigned long flags; /* VGCF_* flags */
struct vcpu_guest_context_regs regs;
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