# HG changeset patch
# User Keir Fraser <keir@xxxxxxxxxxxxx>
# Date 1194984519 0
# Node ID a7f8ff1ca311472fce37b77f1719d87df8e2af85
# Parent 44f24d71729918187b09f3c50992c139f2746cbd
x86: Do not read/write EFER MSR if it doesn't exist.
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
xen/arch/x86/acpi/power.c | 3 ++-
xen/arch/x86/boot/head.S | 1 +
xen/arch/x86/setup.c | 3 ++-
xen/arch/x86/smpboot.c | 3 ++-
xen/arch/x86/x86_32/asm-offsets.c | 3 +++
xen/arch/x86/x86_64/asm-offsets.c | 3 +++
xen/include/asm-x86/cpufeature.h | 2 ++
7 files changed, 15 insertions(+), 3 deletions(-)
diff -r 44f24d717299 -r a7f8ff1ca311 xen/arch/x86/acpi/power.c
--- a/xen/arch/x86/acpi/power.c Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/arch/x86/acpi/power.c Tue Nov 13 20:08:39 2007 +0000
@@ -166,7 +166,8 @@ static int enter_state(u32 state)
/* Restore CR4 and EFER from cached values. */
write_cr4(read_cr4());
- write_efer(read_efer());
+ if ( cpu_has_efer )
+ write_efer(read_efer());
device_power_up();
diff -r 44f24d717299 -r a7f8ff1ca311 xen/arch/x86/boot/head.S
--- a/xen/arch/x86/boot/head.S Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/arch/x86/boot/head.S Tue Nov 13 20:08:39 2007 +0000
@@ -98,6 +98,7 @@ __start:
mov $0x80000001,%eax
cpuid
1: mov %edx,sym_phys(cpuid_ext_features)
+ mov %edx,sym_phys(boot_cpu_data)+CPUINFO_ext_features
#if defined(__x86_64__)
/* Check for availability of long mode. */
diff -r 44f24d717299 -r a7f8ff1ca311 xen/arch/x86/setup.c
--- a/xen/arch/x86/setup.c Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/arch/x86/setup.c Tue Nov 13 20:08:39 2007 +0000
@@ -416,7 +416,8 @@ void __init __start_xen(unsigned long mb
set_current((struct vcpu *)0xfffff000); /* debug sanity */
idle_vcpu[0] = current;
set_processor_id(0); /* needed early, for smp_processor_id() */
- rdmsrl(MSR_EFER, this_cpu(efer));
+ if ( cpu_has_efer )
+ rdmsrl(MSR_EFER, this_cpu(efer));
asm volatile ( "mov %%cr4,%0" : "=r" (this_cpu(cr4)) );
smp_prepare_boot_cpu();
diff -r 44f24d717299 -r a7f8ff1ca311 xen/arch/x86/smpboot.c
--- a/xen/arch/x86/smpboot.c Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/arch/x86/smpboot.c Tue Nov 13 20:08:39 2007 +0000
@@ -495,7 +495,8 @@ void __devinit start_secondary(void *unu
set_processor_id(cpu);
set_current(idle_vcpu[cpu]);
this_cpu(curr_vcpu) = idle_vcpu[cpu];
- rdmsrl(MSR_EFER, this_cpu(efer));
+ if ( cpu_has_efer )
+ rdmsrl(MSR_EFER, this_cpu(efer));
asm volatile ( "mov %%cr4,%0" : "=r" (this_cpu(cr4)) );
percpu_traps_init();
diff -r 44f24d717299 -r a7f8ff1ca311 xen/arch/x86/x86_32/asm-offsets.c
--- a/xen/arch/x86/x86_32/asm-offsets.c Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/arch/x86/x86_32/asm-offsets.c Tue Nov 13 20:08:39 2007 +0000
@@ -115,4 +115,7 @@ void __dummy__(void)
BLANK();
DEFINE(IRQSTAT_shift, LOG_2(sizeof(irq_cpustat_t)));
+ BLANK();
+
+ OFFSET(CPUINFO_ext_features, struct cpuinfo_x86, x86_capability[1]);
}
diff -r 44f24d717299 -r a7f8ff1ca311 xen/arch/x86/x86_64/asm-offsets.c
--- a/xen/arch/x86/x86_64/asm-offsets.c Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/arch/x86/x86_64/asm-offsets.c Tue Nov 13 20:08:39 2007 +0000
@@ -137,4 +137,7 @@ void __dummy__(void)
#endif
DEFINE(IRQSTAT_shift, LOG_2(sizeof(irq_cpustat_t)));
+ BLANK();
+
+ OFFSET(CPUINFO_ext_features, struct cpuinfo_x86, x86_capability[1]);
}
diff -r 44f24d717299 -r a7f8ff1ca311 xen/include/asm-x86/cpufeature.h
--- a/xen/include/asm-x86/cpufeature.h Tue Nov 13 19:26:55 2007 +0000
+++ b/xen/include/asm-x86/cpufeature.h Tue Nov 13 20:08:39 2007 +0000
@@ -146,6 +146,7 @@
#define cpu_has_centaur_mcr boot_cpu_has(X86_FEATURE_CENTAUR_MCR)
#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
#define cpu_has_page1gb 0
+#define cpu_has_efer (boot_cpu_data.x86_capability[1] & 0x20100800)
#else /* __x86_64__ */
#define cpu_has_vme 0
#define cpu_has_de 1
@@ -171,6 +172,7 @@
#define cpu_has_centaur_mcr 0
#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
#define cpu_has_page1gb boot_cpu_has(X86_FEATURE_PAGE1GB)
+#define cpu_has_efer 1
#endif
#define cpu_has_ffxsr ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) \
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