[Xen-changelog] [xen-unstable] cpufreq, amd: Xen support for architectural AMD pstate driver

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir@xxxxxxxxxxxxx>
# Date 1194259507 0
# Node ID ddc9e6b2babb18d357fb244c5620ac7c3ae3d50f
# Parent  28487ba2ea1eb9c83a1a6947ba3845da3edd9280
cpufreq, amd: Xen support for architectural AMD pstate driver

With the third generation Opteron parts, AMD switched to an
architecturally defined interface for PowerNow! that uses
different MSRs than previous versions.

Add support in msr-index.h and traps.c for the new interface.

Signed-off-by: Mark Langsdorf <mark.langsdorf@xxxxxxx>
---
 xen/arch/x86/traps.c            |   22 ++++++++++++++++++++++
 xen/include/asm-x86/msr-index.h |   11 +++++++++++
 2 files changed, 33 insertions(+)

diff -r 28487ba2ea1e -r ddc9e6b2babb xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Mon Nov 05 10:16:30 2007 +0000
+++ b/xen/arch/x86/traps.c      Mon Nov 05 10:45:07 2007 +0000
@@ -1845,6 +1845,17 @@ static int emulate_privileged_op(struct 
 #endif
         case MSR_K7_FID_VID_STATUS:
         case MSR_K7_FID_VID_CTL:
+        case MSR_K8_PSTATE_LIMIT:
+        case MSR_K8_PSTATE_CTRL:
+        case MSR_K8_PSTATE_STATUS:
+        case MSR_K8_PSTATE0:
+        case MSR_K8_PSTATE1:
+        case MSR_K8_PSTATE2:
+        case MSR_K8_PSTATE3:
+        case MSR_K8_PSTATE4:
+        case MSR_K8_PSTATE5:
+        case MSR_K8_PSTATE6:
+        case MSR_K8_PSTATE7:
             if ( (cpufreq_controller != FREQCTL_dom0_kernel) ||
                  (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) ||
                  wrmsr_safe(regs->ecx, eax, edx) )
@@ -1897,6 +1908,17 @@ static int emulate_privileged_op(struct 
 #endif
         case MSR_K7_FID_VID_CTL:
         case MSR_K7_FID_VID_STATUS:
+        case MSR_K8_PSTATE_LIMIT:
+        case MSR_K8_PSTATE_CTRL:
+        case MSR_K8_PSTATE_STATUS:
+        case MSR_K8_PSTATE0:
+        case MSR_K8_PSTATE1:
+        case MSR_K8_PSTATE2:
+        case MSR_K8_PSTATE3:
+        case MSR_K8_PSTATE4:
+        case MSR_K8_PSTATE5:
+        case MSR_K8_PSTATE6:
+        case MSR_K8_PSTATE7:
             if ( (cpufreq_controller != FREQCTL_dom0_kernel) ||
                  (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) ||
                  rdmsr_safe(regs->ecx, regs->eax, regs->edx) )
diff -r 28487ba2ea1e -r ddc9e6b2babb xen/include/asm-x86/msr-index.h
--- a/xen/include/asm-x86/msr-index.h   Mon Nov 05 10:16:30 2007 +0000
+++ b/xen/include/asm-x86/msr-index.h   Mon Nov 05 10:45:07 2007 +0000
@@ -165,6 +165,17 @@
 #define MSR_K8_HWCR                    0xc0010015
 #define MSR_K7_FID_VID_CTL             0xc0010041
 #define MSR_K7_FID_VID_STATUS          0xc0010042
+#define MSR_K8_PSTATE_LIMIT            0xc0010061
+#define MSR_K8_PSTATE_CTRL             0xc0010062
+#define MSR_K8_PSTATE_STATUS           0xc0010063
+#define MSR_K8_PSTATE0                 0xc0010064
+#define MSR_K8_PSTATE1                 0xc0010065
+#define MSR_K8_PSTATE2                 0xc0010066
+#define MSR_K8_PSTATE3                 0xc0010067
+#define MSR_K8_PSTATE4                 0xc0010068
+#define MSR_K8_PSTATE5                 0xc0010069
+#define MSR_K8_PSTATE6                 0xc001006A
+#define MSR_K8_PSTATE7                 0xc001006B
 #define MSR_K8_ENABLE_C1E              0xc0010055
 #define MSR_K8_VM_CR                   0xc0010114
 #define MSR_K8_VM_HSAVE_PA             0xc0010117

_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog