# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1188383641 -3600
# Node ID 86a02b7148fabe25f374b5dbe69579a9d249c821
# Parent 8e9ec8711efac6f62784d916b6018d8ec75f007d
x86: Kill Rise iDragon support.
Don't carry dead code needlessly: this is a family 5 CPU, which Xen
doesn't support. Perhaps, other CPUs' files could use some cleanup in
that respect, too, but there it would increase the delta to the Linux
origin of these files, while here the entire file can go away.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
---
xen/arch/x86/cpu/rise.c | 54 ----------------------------------------------
xen/arch/x86/cpu/Makefile | 1
xen/arch/x86/cpu/common.c | 2 -
3 files changed, 57 deletions(-)
diff -r 8e9ec8711efa -r 86a02b7148fa xen/arch/x86/cpu/Makefile
--- a/xen/arch/x86/cpu/Makefile Tue Aug 28 16:13:35 2007 +0100
+++ b/xen/arch/x86/cpu/Makefile Wed Aug 29 11:34:01 2007 +0100
@@ -8,5 +8,4 @@ obj-y += intel_cacheinfo.o
obj-$(x86_32) += centaur.o
obj-$(x86_32) += cyrix.o
-obj-$(x86_32) += rise.o
obj-$(x86_32) += transmeta.o
diff -r 8e9ec8711efa -r 86a02b7148fa xen/arch/x86/cpu/common.c
--- a/xen/arch/x86/cpu/common.c Tue Aug 28 16:13:35 2007 +0100
+++ b/xen/arch/x86/cpu/common.c Wed Aug 29 11:34:01 2007 +0100
@@ -524,7 +524,6 @@ extern int amd_init_cpu(void);
extern int amd_init_cpu(void);
extern int centaur_init_cpu(void);
extern int transmeta_init_cpu(void);
-extern int rise_init_cpu(void);
void __init early_cpu_init(void)
{
@@ -535,7 +534,6 @@ void __init early_cpu_init(void)
nsc_init_cpu();
centaur_init_cpu();
transmeta_init_cpu();
- rise_init_cpu();
#endif
early_cpu_detect();
}
diff -r 8e9ec8711efa -r 86a02b7148fa xen/arch/x86/cpu/rise.c
--- a/xen/arch/x86/cpu/rise.c Tue Aug 28 16:13:35 2007 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,54 +0,0 @@
-#include <xen/config.h>
-#include <xen/lib.h>
-#include <xen/init.h>
-#include <xen/bitops.h>
-#include <asm/processor.h>
-
-#include "cpu.h"
-
-static void __init init_rise(struct cpuinfo_x86 *c)
-{
- printk("CPU: Rise iDragon");
- if (c->x86_model > 2)
- printk(" II");
- printk("\n");
-
- /* Unhide possibly hidden capability flags
- The mp6 iDragon family don't have MSRs.
- We switch on extra features with this cpuid weirdness: */
- __asm__ (
- "movl $0x6363452a, %%eax\n\t"
- "movl $0x3231206c, %%ecx\n\t"
- "movl $0x2a32313a, %%edx\n\t"
- "cpuid\n\t"
- "movl $0x63634523, %%eax\n\t"
- "movl $0x32315f6c, %%ecx\n\t"
- "movl $0x2333313a, %%edx\n\t"
- "cpuid\n\t" : : : "eax", "ebx", "ecx", "edx"
- );
- set_bit(X86_FEATURE_CX8, c->x86_capability);
-}
-
-static struct cpu_dev rise_cpu_dev __initdata = {
- .c_vendor = "Rise",
- .c_ident = { "RiseRiseRise" },
- .c_models = {
- { .vendor = X86_VENDOR_RISE, .family = 5, .model_names =
- {
- [0] = "iDragon",
- [2] = "iDragon",
- [8] = "iDragon II",
- [9] = "iDragon II"
- }
- },
- },
- .c_init = init_rise,
-};
-
-int __init rise_init_cpu(void)
-{
- cpu_devs[X86_VENDOR_RISE] = &rise_cpu_dev;
- return 0;
-}
-
-//early_arch_initcall(rise_init_cpu);
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