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[Xen-changelog] [xen-unstable] Do not clobber AMD TSC offset on real-mod

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Subject: [Xen-changelog] [xen-unstable] Do not clobber AMD TSC offset on real-mode switch.
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Fri, 27 Jul 2007 03:02:23 -0700
Delivery-date: Fri, 27 Jul 2007 03:00:25 -0700
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# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1184330809 -3600
# Node ID 0aa2a954a6d13578627ec4d0558786b77a8c8afc
# Parent  00fabe66d79e46de1d1318fd545ddbde734a8137
Do not clobber AMD TSC offset on real-mode switch.
Signed-off-by: David Lively <dlively@xxxxxxxxxxxxxxx>
Signed-off-by: Ben Guthro <bguthro@xxxxxxxxxxxxxxx>
---
 xen/arch/x86/hvm/svm/svm.c |    3 ---
 1 files changed, 3 deletions(-)

diff -r 00fabe66d79e -r 0aa2a954a6d1 xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c        Fri Jul 13 13:43:29 2007 +0100
+++ b/xen/arch/x86/hvm/svm/svm.c        Fri Jul 13 13:46:49 2007 +0100
@@ -2328,9 +2328,6 @@ static int svm_reset_to_realmode(struct 
     /* clear the vmcb and user regs */
     memset(regs, 0, sizeof(struct cpu_user_regs));
    
-    /* VMCB Control */
-    vmcb->tsc_offset = 0;
-
     /* VMCB State */
     vmcb->cr0 = X86_CR0_ET | X86_CR0_PG | X86_CR0_WP;
     v->arch.hvm_svm.cpu_shadow_cr0 = X86_CR0_ET;

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