# HG changeset patch
# User Alex Williamson <alex.williamson@xxxxxx>
# Date 1180633214 21600
# Node ID 33c3dbc8ab3d245fe4bdc4b9f21aa43a9a71c963
# Parent 7476a0ea8ee4d21c083718d634d482e65ddb25ae
[IA64] Remove GLOBAL_VHPT
It was always defined.
Signed-off-by: Tristan Gingold <tgingold@xxxxxxx>
---
xen/arch/ia64/xen/fw_emul.c | 18 +----------------
xen/arch/ia64/xen/ivt.S | 44 ------------------------------------------
xen/arch/ia64/xen/vcpu.c | 2 -
xen/include/asm-ia64/config.h | 2 -
4 files changed, 2 insertions(+), 64 deletions(-)
diff -r 7476a0ea8ee4 -r 33c3dbc8ab3d xen/arch/ia64/xen/fw_emul.c
--- a/xen/arch/ia64/xen/fw_emul.c Thu May 31 11:37:38 2007 -0600
+++ b/xen/arch/ia64/xen/fw_emul.c Thu May 31 11:40:14 2007 -0600
@@ -559,13 +559,8 @@ xen_pal_emulator(unsigned long index, u6
.hash_tag_id = 0x30,
.max_dtr_entry = NDTRS - 1,
.max_itr_entry = NITRS - 1,
-#ifdef VHPT_GLOBAL
.max_unique_tcs = 3,
.num_tc_levels = 2
-#else
- .max_unique_tcs = 2,
- .num_tc_levels = 1
-#endif
}};
pal_vm_info_2_u_t v2;
v2.pvi2_val = 0;
@@ -583,7 +578,6 @@ xen_pal_emulator(unsigned long index, u6
(pal_tc_info_u_t *)&r9, &r10);
break;
}
-#ifdef VHPT_GLOBAL
if (in1 == 0 && in2 == 2) {
/* Level 1: VHPT */
const pal_tc_info_u_t v =
@@ -599,16 +593,8 @@ xen_pal_emulator(unsigned long index, u6
r10 = PAGE_SIZE;
status = PAL_STATUS_SUCCESS;
}
-#endif
- else if (
-#ifdef VHPT_GLOBAL
- in1 == 1 /* Level 2. */
-#else
- in1 == 0 /* Level 1. */
-#endif
- && (in2 == 1 || in2 == 2))
- {
- /* itlb/dtlb, 1 entry. */
+ else if (in1 == 1 && (in2 == 1 || in2 == 2)) {
+ /* Level 2: itlb/dtlb, 1 entry. */
const pal_tc_info_u_t v =
{ .pal_tc_info_s = {.num_sets = 1,
.associativity = 1,
diff -r 7476a0ea8ee4 -r 33c3dbc8ab3d xen/arch/ia64/xen/ivt.S
--- a/xen/arch/ia64/xen/ivt.S Thu May 31 11:37:38 2007 -0600
+++ b/xen/arch/ia64/xen/ivt.S Thu May 31 11:40:14 2007 -0600
@@ -126,48 +126,8 @@ ENTRY(itlb_miss)
;;
mov pr = r31, 0x1ffff
;;
-#ifdef VHPT_GLOBAL
br.cond.sptk fast_tlb_miss_reflect
;;
-#endif
- /*
- * The ITLB handler accesses the L3 PTE via the virtually mapped linear
- * page table. If a nested TLB miss occurs, we switch into physical
- * mode, walk the page table, and then re-execute the L3 PTE read
- * and go on normally after that.
- */
- mov r16=cr.ifa // get virtual address
- mov r29=b0 // save b0
- mov r31=pr // save predicates
-.itlb_fault:
- mov r17=cr.iha // get virtual address of L3 PTE
- movl r30=1f // load nested fault
- // continuation point
- ;;
-1: ld8 r18=[r17] // read L3 PTE
- ;;
- mov b0=r29
- tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
-(p6) br.cond.spnt page_fault
- ;;
- itc.i r18
- ;;
-#ifdef CONFIG_SMP
- /*
- * Tell the assemblers dependency-violation checker that the above
- * "itc" instructions cannot possibly affect the following loads:
- */
- dv_serialize_data
-
- ld8 r19=[r17] // read L3 PTE again and see if same
- mov r20=PAGE_SHIFT<<2 // setup page size for purge
- ;;
- cmp.ne p7,p0=r18,r19
- ;;
-(p7) ptc.l r16,r20
-#endif
- mov pr=r31,-1
- rfi
END(itlb_miss)
.org ia64_ivt+0x0800
@@ -242,12 +202,8 @@ 1:
2:
#endif
-#ifdef VHPT_GLOBAL
-// br.cond.sptk page_fault
br.cond.sptk fast_tlb_miss_reflect
;;
-#endif
- mov r29=b0 // save b0
dtlb_fault:
mov r17=cr.iha // get virtual address of L3 PTE
movl r30=1f // load nested fault
diff -r 7476a0ea8ee4 -r 33c3dbc8ab3d xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c Thu May 31 11:37:38 2007 -0600
+++ b/xen/arch/ia64/xen/vcpu.c Thu May 31 11:40:14 2007 -0600
@@ -2222,7 +2222,6 @@ vcpu_itc_no_srlz(VCPU * vcpu, u64 IorD,
ia64_itc(IorD, vaddr, pte, ps); // FIXME: look for bigger mappings
ia64_set_psr(psr);
// ia64_srlz_i(); // no srls req'd, will rfi later
-#ifdef VHPT_GLOBAL
if (vcpu->domain == dom0 && ((vaddr >> 61) == 7)) {
// FIXME: this is dangerous... vhpt_flush_address ensures these
// addresses never get flushed. More work needed if this
@@ -2237,7 +2236,6 @@ vcpu_itc_no_srlz(VCPU * vcpu, u64 IorD,
// PAGE_SIZE mapping in the vhpt for now, else purging is complicated
else
vhpt_insert(vaddr, pte, PAGE_SHIFT << 2);
-#endif
}
IA64FAULT vcpu_itc_d(VCPU * vcpu, u64 pte, u64 itir, u64 ifa)
diff -r 7476a0ea8ee4 -r 33c3dbc8ab3d xen/include/asm-ia64/config.h
--- a/xen/include/asm-ia64/config.h Thu May 31 11:37:38 2007 -0600
+++ b/xen/include/asm-ia64/config.h Thu May 31 11:40:14 2007 -0600
@@ -1,7 +1,5 @@
#ifndef _IA64_CONFIG_H_
#define _IA64_CONFIG_H_
-
-#define VHPT_GLOBAL
#undef DEBUG_PFMON
_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog
|
Home