[Xen-changelog] [xen-unstable] [IA64] Let Xen handle identity mapping for xenolinux region 7

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User awilliam@xxxxxxxxxxxx
# Date 1169088482 25200
# Node ID 2056bc71fa55f08a09b0d7dacfec55915d057087
# Parent  43115ffc6635fe2526c1c5ccc98b93bfd80495b6
[IA64] Let Xen handle identity mapping for xenolinux region 7

During kernel build in dom0, half of the resulting slow reflections
are alt DTLB misses.  Since we know Linux identity maps region 7,
Xen can handle the miss itself.  This reduces the system time component
of the kernel build by nearly 15%.

Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
 xen/arch/ia64/xen/vcpu.c |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletion(-)

diff -r 43115ffc6635 -r 2056bc71fa55 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c  Tue Jan 16 12:01:03 2007 -0700
+++ b/xen/arch/ia64/xen/vcpu.c  Wed Jan 17 19:48:02 2007 -0700
@@ -1682,9 +1682,18 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
        // note: architecturally, iha is optionally set for alt faults but
        // xenlinux depends on it so should document it as part of PV interface
        vcpu_thash(vcpu, address, iha);
-       if (!(rr & RR_VE_MASK) || !(pta & IA64_PTA_VE))
+       if (!(rr & RR_VE_MASK) || !(pta & IA64_PTA_VE)) {
+               REGS *regs = vcpu_regs(vcpu);
+               // NOTE: This is specific code for linux kernel
+               // We assume region 7 is identity mapped
+               if (region == 7 && ia64_psr(regs)->cpl == 2) {
+                       pte.val = address & _PAGE_PPN_MASK;
+                       pte.val = pte.val | pgprot_val(PAGE_KERNEL);
+                       goto out;
+               }
                return is_data ? IA64_ALT_DATA_TLB_VECTOR :
                        IA64_ALT_INST_TLB_VECTOR;
+       }
 
        /* avoid recursively walking (short format) VHPT */
        if (((address ^ pta) & ((itir_mask(pta) << 3) >> 3)) == 0)
@@ -1704,6 +1713,7 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
                return is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR;
 
        /* found mapping in guest VHPT! */
+out:
        *itir = rr & RR_PS_MASK;
        *pteval = pte.val;
        perfc_incrc(vhpt_translate);

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