WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-changelog

[Xen-changelog] [xen-unstable] [IA64] Mask out reserved bits to avoid Re

To: xen-changelog@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-changelog] [xen-unstable] [IA64] Mask out reserved bits to avoid Reserved Register/Field faults.
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Tue, 19 Dec 2006 04:30:14 -0800
Delivery-date: Tue, 19 Dec 2006 04:30:52 -0800
Envelope-to: www-data@xxxxxxxxxxxxxxxxxx
List-help: <mailto:xen-changelog-request@lists.xensource.com?subject=help>
List-id: BK change log <xen-changelog.lists.xensource.com>
List-post: <mailto:xen-changelog@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-changelog>, <mailto:xen-changelog-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-changelog>, <mailto:xen-changelog-request@lists.xensource.com?subject=unsubscribe>
Reply-to: xen-devel@xxxxxxxxxxxxxxxxxxx
Sender: xen-changelog-bounces@xxxxxxxxxxxxxxxxxxx
# HG changeset patch
# User awilliam@xxxxxxxxxxxx
# Date 1166461489 25200
# Node ID 893b786cc66ae67bf761fbe1ff814435dae30210
# Parent  cf23494af72cd6c385d7607ee048253bfd9da2f6
[IA64] Mask out reserved bits to avoid Reserved Register/Field faults.

Signed-off-by: Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxxxxxxx>
---
 xen/arch/ia64/xen/vcpu.c                     |    1 +
 xen/include/asm-ia64/linux-xen/asm/pgtable.h |    5 +++++
 2 files changed, 6 insertions(+)

diff -r cf23494af72c -r 893b786cc66a xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c  Mon Dec 18 09:48:23 2006 -0700
+++ b/xen/arch/ia64/xen/vcpu.c  Mon Dec 18 10:04:49 2006 -0700
@@ -2162,6 +2162,7 @@ vcpu_itc_no_srlz(VCPU * vcpu, u64 IorD, 
        BUG_ON(logps > PAGE_SHIFT);
        vcpu_tlb_track_insert_or_dirty(vcpu, vaddr, entry);
        psr = ia64_clear_ic();
+       pte &= ~(_PAGE_RV2 | _PAGE_RV1);        // Mask out the reserved bits.
        ia64_itc(IorD, vaddr, pte, ps); // FIXME: look for bigger mappings
        ia64_set_psr(psr);
        // ia64_srlz_i(); // no srls req'd, will rfi later
diff -r cf23494af72c -r 893b786cc66a 
xen/include/asm-ia64/linux-xen/asm/pgtable.h
--- a/xen/include/asm-ia64/linux-xen/asm/pgtable.h      Mon Dec 18 09:48:23 
2006 -0700
+++ b/xen/include/asm-ia64/linux-xen/asm/pgtable.h      Mon Dec 18 10:04:49 
2006 -0700
@@ -39,6 +39,11 @@
 #define _PAGE_P                        (1 << _PAGE_P_BIT)      /* page present 
bit */
 #define _PAGE_MA_WB            (0x0 <<  2)     /* write back memory attribute 
*/
 #ifdef XEN
+#define _PAGE_RV1_BIT          1
+#define _PAGE_RV2_BIT          50
+#define _PAGE_RV1              (__IA64_UL(1) << _PAGE_RV1_BIT) /* reserved bit 
*/
+#define _PAGE_RV2              (__IA64_UL(3) << _PAGE_RV2_BIT) /* reserved 
bits */
+
 #define _PAGE_MA_ST            (0x1 <<  2)     /* is reserved for software use 
*/
 #endif
 #define _PAGE_MA_UC            (0x4 <<  2)     /* uncacheable memory attribute 
*/

_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog

<Prev in Thread] Current Thread [Next in Thread>
  • [Xen-changelog] [xen-unstable] [IA64] Mask out reserved bits to avoid Reserved Register/Field faults., Xen patchbot-unstable <=